clc5523 National Semiconductor Corporation, clc5523 Datasheet - Page 5

• Manufacturer Part Number: clc5523
• Description: Low-power, Variable Gain Amplifier
• Manufacturer: National Semiconductor Corporation

The key features of the CLC5523 are:
The CLC5523 combines a closed loop input buffer, a volt-
age controlled variable gain cell and an output amplifier.
The input buffer is a transconductance stage whose gain
is set by the gain setting resistor, R
er is a current feedback op amp and is configured as a
transimpedance stage whose gain is set by, and equal to,
the feedback resistor, R
the CLC5523 is defined by the ratio; R
gain control input (V
the gain is adjusted over a range of 80dB relative to the
maximum set gain.
Setting the CLC5523 Maximum Gain
Although the CLC5523 is specified at A
recommended A
gains are possible but usually impractical due to
output offsets, noise and distortion. When varying A
several tradeoffs are made:
The amount of current which the input buffer can source
into R
sets the maximum input voltage:
The effects of maximum input range on harmonic distortion
are illustrated in the Input Harmonic Distortion plot.
Variations in R
signal bandwidth due to its loading of the input buffer and
can be seen in Frequency Response vs. R
R
bandwidth. The output amplifier of the CLC5523 is a
current feedback amplifier(CFA) and its bandwidth is
determined by R
back resistor will roughly cut the bandwidth of the device
in half (refer to the plot Frequency Response vs. R
more
a basic tutorial, OA-20, Current Feedback Myths
Debunked or a more rigorous analysis, OA-13, Current
Feedback Amplifier Loop Gain Analysis and Performance
Enhancements .
f
will have a more dramatic effect on the small signal
Low Power
Broad voltage controlled gain and attenuation
range
Bandwidth independent, resistor programmable
gain range
Broad signal and gain control bandwidths
Frequency response may be adjusted with R
High Impedance signal and gain control Inputs
g
is limited and is specified in the I
R
R
information
g
f
: determines overall bandwidth
: determines the input voltage range
g
vmax
f
V (max)
. As with any CFA, doubling the feed-
will also have an effect on the small
in
G
) is adjusted over its 0 to 2V range,
varies between 2 and 100. Higher
A
covering
vmax
f
. The maximum gain, A
=
=
I
R max
g
R
R
g
f
g
×
CFA’s,
. The output amplifi-
R
g
R g max
vmax
f
g
CLC5523 Operation
/ R
. Changes in
g
spec. This
there
. As the
= 10, the
vmax
f
f
). For
vmax
, of
is
5
Using the CLC5523 in AGC Applications
In AGC applications, the control loop forces the CLC5523
to have a fixed output amplitude. The input amplitude will
vary over a wide range and this can be the issue that
limits dynamic range.
distortion due to the input buffer driving R
that which is produced by the output amplifier driving the
load. In the plot, Harmonic Distortion vs. Gain , second
and third harmonic distortion are plotted over a gain
range of nearly 40dB for a fixed output amplitude
of 100mV
R
down from A
we can see the distortion is at its worst at this gain. If the
output amplitude of the AGC were to be raised above
100mV, the input amplitudes for gains 40dB down from
A
degrade further. It is for this reason that we recommend
lower output amplitudes if wide gain ranges are desired.
Using a post-amp like the CLC404 or CLC409 would be
the best way to preserve dynamic range and yield output
amplitudes much higher than 100mV
Another way of addressing distortion performance and
its limitations on dynamic range, would be to raise the
value of R
increasing the load resistance, and therefore decreasing
the demanded load current, the distortion performance
will be improved in most cases. With an increased R
will also have to be increased to keep the same A
and this will decrease the overall bandwidth.
Gain Partitioning
If high levels of gain are needed, gain partitioning should
be considered.
The maximum gain range for this circuit is given by the
following equation:
vmax
g
= 100W. When the gain is adjusted to 0.1 (i.e. 40dB
V
in
R
would be even higher and the distortion would
1
g
pp
maximum gain
. Just like any other high-speed amplifier, by
CLC425
vmax
-
+
in the specified configuration, R
Figure 1: Gain Partitioning
), the input amplitude would be 1V
R
2
R
25Wž
At high input amplitudes, the
R
g
c
=
25W
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1
2
3
+
CLC5523
V
R
R
G
1
4
2
1
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÷ ×
ø
pp
7
.
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http://www.national.com
R
R
R
g
6
f
f
g
ö
÷
ø
may exceed
f
pp
= 1k,
V
g
vmax
o
and
, R
f