adc11l066civyx National Semiconductor Corporation, adc11l066civyx Datasheet

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adc11l066civyx

Manufacturer Part Number
adc11l066civyx
Description
11-bit, 66 Msps, 450 Mhz Bandwidth A/d Converter With Internal Sample-and-hold
Manufacturer
National Semiconductor Corporation
Datasheet
© 2003 National Semiconductor Corporation
ADC11L066
11-Bit, 66 MSPS, 450 MHz Bandwidth A/D Converter with
Internal Sample-and-Hold
General Description
The ADC11L066 is a monolithic CMOS analog-to-digital con-
verter capable of converting analog input signals into 11-bit
digital words at 66 Megasamples per second (MSPS), mini-
mum, with typical operation possible up to 80 MSPS. This
converter uses a differential, pipeline architecture with digital
error correction and an on-chip sample-and-hold circuit to
minimize die size and power consumption while providing
excellent dynamic performance. A unique sample-and-hold
stage yields a full-power bandwidth of 450 MHz. Operating
on a single 3.3V power supply, this device consumes just
357 mW at 66 MSPS, including the reference current. The
Power Down feature reduces power consumption to just
50 mW.
The differential inputs provide a full scale input swing equal
to
of the differential input is recommended for optimum perfor-
mance. For ease of use, the buffered, high impedance,
single-ended reference input is converted on-chip to a differ-
ential reference for use by the processing circuitry. Output
data format is 11-bit offset binary.
This device is available in the 32-lead LQFP package and
will operate over the industrial temperature range of −40˚C to
+85˚C.
Connection Diagram
TRI-STATE
±
V
REF
®
is a registered trademark of National Semiconductor Corporation.
with the possibility of a single-ended input. Full use
DS200507
Features
n Single supply operation
n Low power consumption
n Power down mode
n On-chip reference buffer
Key Specifications
n Resolution
n Conversion Rate
n Full Power Bandwidth
n DNL
n INL
n SNR (f
n SFDR (f
n Data Latency
n Supply Voltage
n Power Consumption, 66 MHz
Applications
n Ultrasound and Imaging
n Instrumentation
n Cellular Base Stations/Communications Receivers
n Sonar/Radar
n Wireless Local Loops
n Data Acquisition Systems
n DSP Front Ends
IN
IN
= 10 MHz)
= 10 MHz)
20050701
December 2003
+3.3V
6 Clock Cycles
±
±
357 mW (typ)
www.national.com
0.2 LSB (typ)
0.5 LSB (typ)
65 dB (typ)
78 dB (typ)
66 MSPS
±
450 MHz
300 mV
11 Bits

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adc11l066civyx Summary of contents

Page 1

... This device is available in the 32-lead LQFP package and will operate over the industrial temperature range of −40˚C to +85˚C. Connection Diagram TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2003 National Semiconductor Corporation Features n Single supply operation n Low power consumption n Power down mode ...

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... Ordering Information Industrial (−40˚C ≤ T ADC11L066CIVY ADC11L066CIVYX Block Diagram www.national.com ≤ +85˚ Package 32 Pin LQFP 32 Pin LQFP Tape and Reel 20050702 ...

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Pin Descriptions and Equivalent Circuits Pin No. Symbol ANALOG I − REF DIGITAL I/O 10 CLK Equivalent Circuit ...

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Pin Descriptions and Equivalent Circuits Pin No. Symbol 15–19, D0–D10 22–27 ANALOG POWER AGND DIGITAL POWER DGND GND OTHER 14 TEST www.national.com ...

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Absolute Maximum Ratings 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications – Voltage on Any Pin Input ...

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Converter Electrical Characteristics Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V +2.5V 0V +1.0V REF Boldface limits apply for ...

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Converter Electrical Characteristics Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V +2.5V 0V +1.0V REF Boldface limits apply for ...

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Converter Electrical Characteristics Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V +2.5V 0V +1.0V REF Boldface limits apply for ...

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AC Electrical Characteristics Unless otherwise specified, the following specifications apply for AGND = DGND = DR GND = 0V +2/.5V 0V +1.0V REF Boldface limits apply for ...

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AC Electrical Characteristics Note 14 the current consumed by the switching of the output drivers and is primarily determined by load capacitance on the output pins, the supply voltage and the rate at which the ...

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Timing Diagram Transfer Characteristic Output Timing FIGURE 1. Transfer Characteristic 11 20050709 20050710 www.national.com ...

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Typical Performance Characteristics V = 1.0V, unless otherwise stated. REF DNL DNL vs. Clock Duty Cycle INL www.national.com 3.3V 2.5V 200507E6 DNL vs. Temperature 20050792 200507E7 MHz, ...

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Typical Performance Characteristics V = 1.0V, unless otherwise stated. (Continued) REF INL vs. Clock Duty Cycle SNR vs SNR vs 3.3V 2.5V INL vs. Temperature 20050795 ...

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Typical Performance Characteristics V = 1.0V, unless otherwise stated. (Continued) REF SNR vs. Clock Duty Cycle SNR vs. Temperature THD vs www.national.com 3.3V 2.5V 200507B3 200507B5 200507B7 14 ...

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Typical Performance Characteristics V = 1.0V, unless otherwise stated. (Continued) REF THD vs. f CLK THD vs. V REF SINAD vs 3.3V 2.5V THD vs. Clock Duty Cycle ...

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Typical Performance Characteristics V = 1.0V, unless otherwise stated. (Continued) REF SINAD vs. V SINAD vs. Clock Duty Cycle SINAD vs. Temperature www.national.com 3.3V 200507C6 200507C8 200507D1 16 = 2.5V ...

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Typical Performance Characteristics V = 1.0V, unless otherwise stated. (Continued) REF SFDR vs SFDR vs. f CLK SFDR vs. V REF 3.3V 2.5V 200507D3 SFDR vs. Clock Duty ...

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Typical Performance Characteristics V = 1.0V, unless otherwise stated. (Continued) REF Power Consumption vs. f Spectral Response @ 10 MHz Input Spectral Response @ 50 MHz Input www.national.com 3.3V CLK 200507D9 Spectral ...

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Typical Performance Characteristics V = 1.0V, unless otherwise stated. (Continued) REF Spectral Response @ 150 MHz Input @ Spectral Response 240 MHz Input 3.3V 2.5V Spectral Response 200507J2 200507E5 19 ...

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Functional Description Operating on a single +3.3V supply, the ADC11L066 uses a pipeline architecture and has error correction circuitry to help ensure maximum performance. Differential analog input signals are digitized to 11 bits. Each analog input signal should have a ...

Page 21

Applications Information The two input signals should be exactly 180˚ out of phase from each other and of the same amplitude. For single frequency (sine wave) inputs, angular errors result in a re- duction of the effective full scale input. ...

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Applications Information 2.1 CLK The CLK signal controls the timing of the sampling process. Drive the clock input with a stable, low jitter clock signal in the range of 10 MHz to 80 MHz with rise and fall times of ...

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Applications Information FIGURE 4. Simple Application Circuit with Single-Ended to Differential Buffer FIGURE 5. Differential Drive Circuit of Figure 4 (Continued) 23 20050713 20050714 www.national.com ...

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Applications Information FIGURE 6. Driving the Signal Inputs with a Transformer 4.0 POWER SUPPLY CONSIDERATIONS The power supply pins should be bypassed with a 10 µF capacitor and with a 0.1 µF ceramic chip capacitor within a centimeter of each ...

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Applications Information weight will have little effect upon the logic-generated noise. Generally, analog and digital lines should cross each other at 90˚ to avoid crosstalk. To maximize accuracy in high speed, high resolution systems, however, avoid crossing analog and digital ...

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Applications Information pins). Exceeding these limits on even a transient basis may cause faulty or erratic operation not uncommon for high speed digital components (e.g., 74F and 74AC devices) to exhibit overshoot or undershoot that goes above the ...

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... NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant ...

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