adc12dc105cisq National Semiconductor Corporation, adc12dc105cisq Datasheet - Page 4

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adc12dc105cisq

Manufacturer Part Number
adc12dc105cisq
Description
Dual 12-bit, 105 Msps A/d Converter With Cmos Outputs
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
ANALOG POWER
Exposed Pad
DIGITAL POWER
8, 16, 17, 58,
1, 4, 12, 15,
25, 37, 51
26, 38,50
Pin No.
42-49,
23-24,
52-55
27-36
39
60
DA8-DA11
DB3-DB11
DA0-DA7,
DB0-DB1,
Symbol
DRGND
DRDY
AGND
V
V
DR
A
Equivalent Circuit
4
Digital data output pins that make up the 12-bit conversion result
for Channel A. DA0 (pin 42) is the LSB, while DA11 (pin 55) is the
MSB of the output word. Output levels are CMOS compatible.
Digital data output pins that make up the 12-bit conversion result
for Channel B. DB0 (pin 23) is the LSB, while DB11 (pin 36) is the
MSB of the output word. Output levels are CMOS compatible.
Data Ready Strobe. The data output transition is synchronized with
the falling edge of this signal. This signal switches at the same
frequency as the CLK input.
Positive analog supply pins. These pins should be connected to a
quiet source and be bypassed to AGND with 0.1 µF capacitors
located close to the power pins.
The ground return for the analog supply.
Positive driver supply pin for the output drivers. This pin should be
connected to a quiet voltage source and be bypassed to DRGND
with a 0.1 µF capacitor located close to the power pin.
The ground return for the digital output driver supply. This pins
should be connected to the system digital ground, but not be
connected in close proximity to the ADC's AGND pins.
Description

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