adc12032 National Semiconductor Corporation, adc12032 Datasheet - Page 10

• Manufacturer Part Number: adc12032
• Description: Self-calibrating 12-bit Plus Sign Serial I/o A/d Converters With Mux And Sample/hold
• Manufacturer: National Semiconductor Corporation

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t
t
t
t
t
t
t
t
t
t
t
t
C
C
ACC
SET-UP
DELAY
1H
HDI
SDI
HDO
DDO
RDO
FDO
CD
SD
Symbol
IN
OUT
AC Electrical Characteristics
The following specifications apply for V
sion mode, t
MHz for the ADC12030, ADC12032, ADC12034 and ADC12038, R
fully-differential input with fixed 2.048V common-mode voltage, and 10(t
face limits apply for T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND, unless otherwise specified.
Note 3: When the input voltage (V
The 120 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 30 mA to four.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
T
, t
J
max = 150˚C. The typical thermal resistance (θ
0H
EOC Rising Edge
Access Time Delay from
CS Falling Edge to DO Data Valid
Set-Up Time of CS Falling Edge to
Serial Data Clock Rising Edge
Delay from SCLK Falling
Edge to CS Falling Edge
Delay from CS Rising Edge to
DO TRI-STATE
DI Hold Time from Serial Data
Clock Rising Edge
DI Set-Up Time from Serial Data
Clock Rising Edge
DO Hold Time from Serial Data
Clock Falling Edge
Delay from Serial Data Clock
Falling Edge to DO Data Valid
DO Rise Time, TRI-STATE to High
DO Rise Time, Low to High
DO Fall Time, TRI-STATE to Low
DO Fall Time, High to Low
Delay from CS Falling Edge
to DOR Falling Edge
Delay from Serial Data Clock Falling
Edge to DOR Rising Edge
Capacitance of Logic Inputs
Capacitance of Logic Outputs
r
= t
f
= 3 ns, f
A
Parameter
= T
CK
IN
) at any pin exceeds the power supplies (V
J
= f
= T
ADC12H030CIWM, ADC12030CIWM
ADC12H032CIWM, ADC12032CIWM
ADC12H034CIN, ADC12034CIN
ADC12H034CIWM, ADC12034CIWM
ADC12H034CIMSA
ADC12H038CIWM, ADC12038CIWM
SK
MIN
= 8 MHz for the ADC12H030, ADC12H032, ADC12H034 and ADC12H038, f
to T
JA
+
D
) of these parts when board mounted follow:
= V
= (T
MAX
J
A
max − T
+ = V
Part Number
; all other limits T
(Continued)
D
A
)/θ
+ = +5.0 V
R
R
R
R
JA
L
L
L
L
= 3k, C
= 3k, C
= 3k, C
= 3k, C
or the number given in the Absolute Maximum Ratings, whichever is lower. For this device,
Conditions
IN
10
DC
<
A
L
L
L
L
GND or V
= T
= 100 pF
= 100 pF
= 100 pF
= 100 pF
, V
S
REF
= 25Ω, source impedance for V
J
= 25˚C. (Note 17)
CK
+ = +4.096 V
IN
) acquisition time unless otherwise specified. Bold-
>
V
A
Resistance
+ or V
Thermal
J
70˚C/W
64˚C/W
42˚C/W
57˚C/W
97˚C/W
50˚C/W
max, θ
θ
(Note 10)
JA
D
Typical
+), the current at that pin should be limited to 30 mA.
DC
JA
20
40
25
35
10
10
12
12
25
25
10
20
0
5
5
, V
and the ambient temperature, T
REF
− = 0 V
REF
(Note 11)
DC
Limits
100
+ and V
50
30
15
10
50
50
30
30
30
30
45
45
, 12-bit + sign conver-
5
5
CK
REF
A
. The maximum
= f
− ≤ 25Ω,
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
(Limits)
SK
Units
pF
pF
= 5