adc12132 National Semiconductor Corporation, adc12132 Datasheet - Page 9

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adc12132

Manufacturer Part Number
adc12132
Description
Self-calibrating 12-bit Plus Sign Serial I/o A/d Converters With Mux And Sample/hold
Manufacturer
National Semiconductor Corporation
Datasheet

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t
t
t
t
t
t
t
t
t
t
t
t
t
t
C
C
HPU
SPU
ACC
SET-UP
DELAY
1H
HDI
SDI
HDO
DDO
RDO
FDO
CD
SD
AC Electrical Characteristics
The following specifications apply for (V
common-mode voltage) or (V
mode voltage), V
= f
other limits T
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions.
Note 2: All voltages are measured with respect to GND, unless otherwise specified.
Note 3: When the input voltage (V
The 120 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 30 mA to four.
Note 4: The maximum power dissipation must be derated at elevated temperatures and is dictated by T
allowable power dissipation at any temperature is P
T
Note 5: The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin.
Note 6: See AN450 “Surface Mounting Methods and Their Effect on Product Reliability” or the section titled “Surface Mount” found in any post 1986 National
Semiconductor Linear Data Book for other methods of soldering surface mount devices.
Note 7: Two on-chip diodes are tied to each analog input through a series resistor as shown below. Input voltage magnitude up to 5V above V
will not damage this device. However, errors in the A/D conversion can occur (if these diodes are forward biased by more than 50 mV) if the input voltage magnitude
of selected or unselected analog input go above V
V
IN
OUT
Symbol
J
DC
, t
max = 150˚C.
SK
0H
to ensure accurate conversions.
= 5 MHz, and 10 (t
Hardware Power-Up Time, Time from PD
Falling Edge to EOC Rising Edge
Software Power-Up Time, Time from
Serial Data Clock Falling Edge to EOC
Rising Edge
Access Time Delay from CS Falling Edge
to DO Data Valid
Set-Up Time of CS Falling Edge to Serial
Data Clock Rising Edge
Delay from SCLK Falling Edge to CS
Falling Edge
Delay from CS Rising Edge to DO
TRI-STATE
DI Hold Time from Serial Data Clock
Rising Edge
DI Set-Up Time from Serial Data Clock
Rising Edge
DO Hold Time from Serial Data Clock
Falling Edge
Delay from Serial Data Clock Falling Edge
to DO Data Valid
DO Rise Time, TRI-STATE to High DO
Rise Time, Low to High
DO Fall Time, TRI-STATE to Low DO Fall
Time, High to Low
Delay from CS Falling Edge to DOR
Falling Edge
Delay from Serial Data Clock Falling Edge
to DOR Rising Edge
Capacitance of Logic Inputs
Capacitance of Logic Outputs
A
= T
REF
J
= 25˚C. (Note 17) (Continued)
− = 0V, 12-bit + sign conversion mode, source impedance for analog inputs, V
CK
) acquisition time unless otherwise specified. Boldface limits apply for T
IN
Parameter
) at any pin exceeds the power supplies (V
+
= V
A
+ = V
A
+
D
+ or below GND by more than 50 mV. As an example, if V
D
= (T
= V
+ = +3.3V, V
J
A
max − T
+ = V
A
D
)/θ
+ = +5V, V
JA
REF
or the number given in the Absolute Maximum Ratings, whichever is lower. For this device,
R
R
R
R
+ = +2.5V and fully-differential input with fixed 1.250V common-
L
L
L
L
= 3k, C
= 3k, C
= 3k, C
= 3k, C
IN
9
<
REF
Conditions
GND or V
+ = +4.096V, and fully-differential input with fixed 2.048V
L
L
L
L
= 100 pF
= 100 pF
= 100 pF
= 100 pF
IN
>
V
A
+ or V
J
max, θ
D
+), the current at that pin should be limited to 30 mA.
A
+ is 4.5 V
JA
(Note 10)
Typical
and the ambient temperature, T
500
500
25
70
35
50
10
10
15
15
45
45
20
20
0
5
5
DC
, full-scale input voltage must be ≤4.55
REF
A
(Note 11)
− and V
= T
Limits
700
700
100
60
50
15
10
65
90
40
40
40
40
80
80
J
5
5
= T
A
REF
+ or 5V below GND
MIN
A
+ ≤ 25Ω, f
. The maximum
www.national.com
to T
µs (max)
µs (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
ns (max)
(Limits)
ns (min)
ns (min)
ns (min)
ns (min)
Units
MAX
pF
pF
; all
CK

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