e-stlc3095 STMicroelectronics, e-stlc3095 Datasheet - Page 4

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e-stlc3095

Manufacturer Part Number
e-stlc3095
Description
Integrated Pots Interface For Home Gateway And Wll
Manufacturer
STMicroelectronics
Datasheet
Block diagram and pin description
1.3
Table 1.
4/28
39,40,42
6,22,38,
10
11
12
13
14
15
16
17
18
19
20
21
23
24
25
1
2
3
4
5
7
8
9
RESERVED Connected to GND
RESERVED Connected to GND
RESERVED Connected to GND
RESERVED Left open.
RESERVED Connected to GND
Gain SET
RSENSE
Pin description
Pin description
GATE
ZAC1
CAC
DET
ZAC
CLK
Pin
NC
PD
RX
RS
CZ
D0
D1
D2
ZB
TX
VF
Control Interface: input bit 0.
Control Interface: input bit 1.
Control interface: input bit 2.
Power Down input. Normally connected to CVCC (or to logic level high).
Control gain interface
0 Level R
1 Level R
Not connected.
Logic interface output of the supervision detector (active low).
4 wire input port (RX input); 300KΩ input impedance. This signal is referred to AGND.
If connected to single supply CODEC output it must be DC decoupled with proper
capacitor.
RX buffer output (the AC impedance is connected from this node to ZAC).
AC impedance synthesis.
Protection resistors image (the image resistor is connected from this node to ZAC).
Balance Network for 2 to 4 wire conversion (the balance impedance ZB is connected from
this node to AGND. ZA impedance is connected from this node to ZAC1).
AC feedback input, AC/DC split capacitor (CAC).
4 wire output port (TX output). The signal is referred to AGND. If connected to single
supply
CODEC input it must be DC decoupled with proper capacitor.
Fly-Back compensation
Feedback input for DC/DC converter controller.
Power Switch Controller Clock (typ. 125KHz). This pin can also be connected to CVCC or
AGND. When the CLK pin is connected to CVCC an internal auto-oscillation is internally
generated and it is used instead of the external clock. When the CLK pin is connected to
AGND, the GATE output is disabled.
Driver for external Power MOS transistor (P-channel in Buck-boost configuration, N-
channel in Fly-back configuration).
Voltage input for current sensing. RSENSE resistor should be connected close to this pin
and VPOS pin (Buck-boost) or GND (Fly-back). The PCB layout should minimize the
extra resistance introduced by the copper tracks.
xgain
xgain
= 0dB
= +6dB
T
T
xgain
xgain
= -6dB
= -12dB
Function
STLC3095

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