lm9820ccwmx National Semiconductor Corporation, lm9820ccwmx Datasheet - Page 17

• Manufacturer Part Number: lm9820ccwmx
• Description: 10/12-bit Image Sensor Processor Analog Front End
• Manufacturer: National Semiconductor Corporation

1.8 Power Down Mode
Setting the Power Down (bit B0 of register 7) puts the device in a
low power standby mode. The analog sections are turned off to
conserve power. The digital logic will continue to operate if
continues, so for minimum power dissipation
stopped when the LM9810/20 enters the Power Down mode.
Recovery from Power Down typically takes 50µs (the time
required for the reference voltages to settle to 0.5 LSB accuracy).
2.0 Clamping
To perform a DC restore across the AC coupling capacitors at the
beginning of every line, the LM9810/20 implements a clamping
function. When
inputs will be connected to either
of the Sampling and Color Mode register. If B4 is set to one (pos-
itive signal polarity), then the OS inputs will be connected to
. If B4 is set to zero (negative signal polarity), then they will be
connected to
2.1 Clamp Capacitor Selection
This section explains how to select appropriate clamp capacitor
values.
The output signal of many sensors rides on a DC offset (greater
than 5V for many CCDs) which is incompatible with the
LM9810/20’s 5V operation. To eliminate this offset without resort-
ing to additional higher voltage components, the output of the
sensor is AC coupled to the LM9810/20 through a DC blocking
capacitor, C
used. The value of this capacitor is determined by the leakage
current of the LM9810/20’s OS input and the output impedance of
the sensor. The leakage through the OS input determines how
quickly the capacitor value will drift from the clamp value of
or
cessed before the droop causes errors in the conversion (±0.1V
is the recommended limit for CDS operation). The output imped-
ance of the sensor determines how quickly the capacitor can be
charged to the clamp value during the black reference period at
the beginning of every line.
The minimum clamp capacitor value is determined by the maxi-
mum droop the LM9810/20 can tolerate while converting one
sensor line. The minimum clamp capacitor value is much smaller
for CDS mode applications than it is for CIS mode applications.
The LM9810/20 input leakage current is considerably less when
V
REF-
Figure 5: OS Clamp Capacitor and Internal Clamp
Equation 6: Simplified output code calculation
, which then determines how many pixels can be pro-
CLAMP
V
SENSOR
REF+
D
NewLine
OUT
. The sensor’s DOS output, if available, is not
.
DOS
OS
=
is high and
V
IN
NC
C
G
CLAMP
B
+
V
REF+
V
SampCLK
DAC
or
OS
V
LM9810/20
REF+
V
G
REF-
PGA
or
is low, all three OS
, depending on B4
MCLK
V
C
REF-
should be
MCLK
V
V
REF+
REF-
17
the LM9810/20 is operating in CDS mode. In CDS mode, the
LM9810/20 leakage current should be no more than 20nA. With
CDS disabled, which will likely be the case when CIS sensors are
used, the LM9810/20 leakage current can be as high as 25uA at
the maximum conversion rate.
2.1.1 CDS mode Minimum Clamp Capacitor Calculation:
The following equation takes the maximum leakage current into
the OS input, the maximum allowable droop, the number of pixels
on the sensor, and the pixel conversion rate, f
vides the minimum clamp capacitor value:
For example, if the OS input leakage current is 20nA worst-case,
the sensor has 2700 active pixels, the conversion rate is 2MHz
(t
mum clamp capacitor value is:
2.1.2 CIS mode Minimum Clamp Capacitor Calculation:
If CDS is disabled, then the maximum LM9810/20 OS input leak-
age current can be calculated from:
where V
and C
pling capacitor (2pF). Inserting this into Equation 7 results in:
with C
maximum input signal), then Equation 10 reduces to:
In CIS mode (CDS disabled), the max droop limit must be much
more carefully chosen, since any change in the clamp capacitor’s
DC value will affect the LM9810/20’s conversion results. If a
droop of one 10 bit LSB across a line is considered acceptable,
then the allowed droop voltage is calculated as: 2V/1024, or
SampCLK
Equation 9: CIS mode Input Leakage Current Calculation
C
C CLAMP MIN
CLAMP MIN
C
SAMP
Equation 10: CIS mode C
SAMP
CLAMP MIN
Equation 11: CIS mode C
Equation 7: CDS mode C
SAT
Equation 8: CDS mode C
= 500ns), and the max droop desired is 0.1V, the mini-
=
is the capacitance of the LM9810/20’s internal sam-
equal to 2pF and V
is the peak pixel signal swing of the CIS OS output
I
---------------------------C
t
leakage
SampCLK
V
SAT
=
C
=
CLAMP MIN
-------- - dt
=
=
dV
-------- - dt
dV
i
=
i
----------------------------------- - num pixels
max droop(V)
leakage current (A)
-------------------------------------------------- -
V
4p(F)(V)
max droop(V)
SAMP
SAT
f
SAT
SampCLK
----------------------------------- - num pixels
max droop(V)
=
CLAMP MIN
=
t
CLAMP MIN
CLAMP MIN
SampCLK
270pF
CLAMP MIN
equal to 2V (the LM9810/20’s
20nA
------------- -
0.1V
-------------- -
2MHz
C
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2700
number of pixels
------------------------------------------- -
SAMP
Calculation
Calculation
Calculation
f
SampCLK
Example
SampCLK
, and pro-