max5679 Maxim Integrated Products, Inc., max5679 Datasheet - Page 13

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max5679

Manufacturer Part Number
max5679
Description
Digitally Programmable Lcd Gamma Reference Generator With Digital Voltage Reference
Manufacturer
Maxim Integrated Products, Inc.
Datasheet

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Table 2a. Mode 1
(MAX5678 Compatible Mode)
Send a START condition followed by the 7-bit slave
address of the device with the R/W bit set to 1 to initiate
a read command to the MAX5679. The MAX5679 then
sequentially outputs 8 bytes of data if operating in
mode 1 or 15 bytes if in mode 2 that correspond to the
values stored in its internal registers. The first data byte
represents the contents of the DVR register. The follow-
ing 7 or 14 bytes of data represent the gamma DAC
settings.
The DVR register stores the 1st data byte transmitted to
the MAX5679 following a START condition and the
device slave address when a write operation is per-
formed (Figures 6a and 6b). The DVR register sets the
code for the DVR DAC and controls the operation of the
SET and DVR outputs. The DVR DAC is a 7-bit DAC
with the least significant bit (LSB) of this register as a
don’t-care bit (Table 3). When performing a read from
the MAX5679, the DVR register data is the first byte to
be output by the device following a START condition
and the slave address. A read from the DVR register
always returns an LSB value of 1.
The MAX5679 includes a total of 14 gamma registers
that store the digital codes for the gamma DACs, which
control outputs OUT1–OUT14. When writing to the
MAX5679, the first data byte transmitted after the DVR
data is stored in the first gamma register and subse-
quent bytes of data are stored in the remaining gamma
registers until either seven or all 14 have been written,
depending on the mode (Tables 2a and 2b). Each
gamma register controls an upper and a lower DAC
output. The upper and lower DACs share the same dig-
ital code in mode 1. See the Gamma DAC Transfer
DATA BYTE
Digitally Programmable LCD Gamma Reference
GAMMA
1
2
3
4
5
6
7
Register 1
Register 2
Register 3
Register 4
Register 5
Register 6
Register 7
WRITE OPERATION
Generator with Digital Voltage Reference
______________________________________________________________________________________
REGISTER
Register 14
Register 13
Register 12
Register 11
Register 10
Register 9
Register 8
Read Data Format
READ OPERATION
Gamma Register
REGISTER READ
DVR Register
Register 1
Register 2
Register 3
Register 4
Register 5
Register 6
Register 7
Table 2b. Mode 2
Functions section. When a read from the MAX5679 is
performed, the contents of the gamma registers are
output sequentially after the DVR register data (Figures
6a and 6b). If the MAX5679 is operating in mode 1,
issue a stop condition after receiving the 7th gamma
byte. If the device is operating in mode 2, issue a stop
condition after receiving the 14th gamma byte.
The registers of the MAX5679 are updated on the rising
edge of SCL during the acknowledge bit. All bus cycles
require each 8-bit byte to be followed by an acknowl-
edge bit. If a write sequence is aborted before its
respective acknowledge bit, the data values are not
updated and the MAX5679 waits for a new START con-
dition and a valid slave address. For the MAX5679, a
write operation from the master may contain additional
data beyond what is required to program all the internal
registers. In this situation, the MAX5679 ignores any
data beyond the 15th data byte (DVR plus 14 gamma
bytes). The MAX5679 also accepts write commands
with fewer than 8 bytes. In this case, the number of reg-
isters that are updated corresponds to the number of
bytes sent. If there are more registers than bytes sent,
the remaining registers contain their previous values. If
multiple write operations are performed by the master,
each operation is performed on the MAX5679 data reg-
isters as requested.
REGISTER
GAMMA
BYTE
10
11
12
13
14
1
2
3
4
5
6
7
8
9
WRITE OPERATION
REGISTER DATA
STORED
Data 10
Data 11
Data 12
Data 13
Data 14
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Data 8
Data 9
READ OPERATION
REGISTER DATA
Register Update
Data 10
Data 11
Data 12
Data 13
Data 14
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
Data 8
Data 9
READ
13

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