max5820 Maxim Integrated Products, Inc., max5820 Datasheet - Page 7

• Manufacturer Part Number: max5820
• Description: Max5820 Dual, 8-bit, Low-power, 2-wire, Serial Voltage-output Dac
• Manufacturer: Maxim Integrated Products, Inc.

The MAX5820 is a dual, 8-bit, voltage-output DAC with
an I
device consists of a serial interface, power-down cir-
cuitry, dual input and DAC registers, two 8-bit resistor
string DACs, two unity-gain output buffers, and output
resistor networks. The serial interface decodes the
address and control bits, routing the data to the proper
input or DAC register. Data can be directly written to
the DAC register, immediately updating the device out-
put, or can be written to the input register without
changing the DAC output. Both registers retain data as
long as the device is powered.
The MAX5820 uses a segmented resistor string DAC
architecture, which saves power in the overall system
and guarantees output monotonicity. The MAX5820’s
input coding is straight binary, with the output voltage
given by the following equation:
where N = 8 (bits) and D = the decimal value of the
input code (0 to 255).
The MAX5820 analog outputs are buffered by precision,
unity-gain followers that slew 0.5V/µs. Each buffer output
swings rail-to-rail, and is capable of driving 5kΩ in parallel
with 200pF. The output settles to ±0.5 LSB within 4µs.
The MAX5820 features an internal POR circuit that ini-
tializes the device upon power-up. The DAC registers
are set to zero scale and the device is powered down,
with the output buffers disabled and the outputs pulled
SMBus is a trademark of Intel Corporation.
2
PIN
C/SMBus™-compatible 2-wire interface. The
1
2
3
4
5
6
7
8
V
NAME
OUTA
OUTB
_______________________________________________________________________________________
GND
ADD
SDA
V
SCL
OUT
REF
DD
Detailed Description
_ =
Dual, 8-Bit, Low-Power, 2-Wire, Serial
V
REF
Power Supply
Ground
Address Select. A logic-high sets the address LSB to 1; a logic-low sets the address LSB to zero.
Serial Clock Input
Bidirectional Serial Data Interface
Reference Input
DAC A Output
DAC B Output
2
N
×
D
Power-On Reset
DAC Operation
Output Buffer
to GND through the 100kΩ termination resistor.
Following power-up, a wake-up command must be initi-
ated before any conversions are performed.
The MAX5820 has three software-controlled low-power
power-down modes. All three modes disable the output
buffers and disconnect the DAC resistor strings from
REF, reducing supply current draw to 1µA and the ref-
erence current draw to less than 1µA. In power-down
mode 0, the device output is high impedance. In
power-down mode 1, the device output is internally
pulled to GND by a 1kΩ termination resistor. In power-
down mode 2, the device output is internally pulled to
GND by a 100kΩ termination resistor. Table 1 shows
the power-down mode command words.
Upon wake-up, the DAC output is restored to its previ-
ous value. Data is retained in the input and DAC regis-
ters during power-down mode.
The MAX5820 features an I
wire interface consisting of a serial data line (SDA) and
a serial clock line (SCL). The MAX5820 is SMBus com-
patible within the range of V
SCL facilitate bidirectional communication between the
MAX5820 and the master at rates up to 400kHz. Figure
1 shows the 2-wire interface timing diagram. The
MAX5820 is a transmit/receive slave-only device, rely-
ing upon a master to generate a clock signal. The mas-
ter (typically a microcontroller) initiates data transfer on
the bus and generates SCL to permit that transfer.
A master device communicates to the MAX5820 by
transmitting the proper address followed by command
and/or data words. Each transmit sequence is framed
by a START (S) or REPEATED START (S
a STOP (P) condition. Each word transmitted over the
bus is 8 bits long and is always followed by an
acknowledge clock pulse.
FUNCTION
Voltage-Output DAC
DD
2
Power-Down Modes
C/SMBus-compatible 2-
Pin Description
= 2.7V to 3.6V. SDA and
Digital Interface
r
) condition and
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