max5891egkt4ead Maxim Integrated Products, Inc., max5891egkt4ead Datasheet - Page 5

• Manufacturer Part Number: max5891egkt4ead
• Description: Max5891 16-bit, 600msps, High-dynamic-performance Dac With Lvds Inputs
• Manufacturer: Maxim Integrated Products, Inc.

Note 2: Parameter tested with input data pattern based on 16,384 data points. f
Note 3: Parameter tested exactly at f
Note 4: This parameter does not include update-rate-dependent effects of sin(x)/x filtering inherent in the MAX5891.
Note 5: Parameter measured single-ended with 50Ω double-terminated outputs.
Note 6: Not production tested. Guaranteed by design.
Note 7: Differential input voltage defined as V
Note 8: Combination of logic-high/-low and common-mode voltages must not exceed absolute maximum rating for D_P/D_N inputs.
Note 9: Parameter defined as the change in midscale output caused by a ±5% variation in the nominal supply voltages.
ELECTRICAL CHARACTERISTICS (continued)
(AV
transformer-coupled output, I
by production testing. Specifications at T
Digital Supply Voltage Range
Analog Supply Current
Clock Supply Current
Digital Supply Current
Total Power Dissipation
Power-Supply Rejection Ratio
DD3.3
contains prime number of f
the Electrical Characteristics table and Typical Operating Characteristics.
V
V
16-Bit, 600Msps, High-Dynamic-Performance
= DV
D_N
D_P
PARAMETER
DD3.3
= AV
_______________________________________________________________________________________
CLK
OUT
= 3.3V, AV
= 20mA, T
OUT
OUT
SYMBOL
I
I
DV
DV
I
I
DVDD3.3
DVDD1.8
AVDD3.3
AVDD1.8
I
cycles and is a nonrepetitive sequence. f
AVCLK
P
PSRR
A
DD1.8
= 16.204833984375MHz and with a clock frequency of 500MHz at an output amplitude of 0dBFS.
DISS
DD3.3
DD1.8
< +25°C are guaranteed by design and characterization. Typical values are at T
A
D_P
= -40°C to +85°C, unless otherwise noted. Specifications at T
= DV
V
IHLVDS
- V
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
f
Power-down, clock static low,
data input static
(Note 9)
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
DD1.8
D_N
= 100MHz, f
= 500MHz, f
= 600MHz, f
= 100MHz, f
= 500MHz, f
= 600MHz, f
= 100MHz, f
= 500MHz, f
= 600MHz, f
= 100MHz, f
= 500MHz, f
= 600MHz, f
= 100MHz, f
= 500MHz, f
= 600MHz, f
= 100MHz, f
= 500MHz, f
= 600MHz, f
.
= 1.8V, external reference V
CONDITIONS
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
= 16MHz
DAC with LVDS Inputs
OUT
V
OUT
ILLVDS
has been chosen so the corresponding input pattern
has been rounded to the nearest MHz number in both
REFIO
= 1.2V, output load 50Ω double-terminated,
3.135
1.710
MIN
±0.025
TYP
26.5
26.5
26.5
11.3
10.6
50.5
137
267
298
A
3.3
1.8
2.8
2.8
2.8
0.2
0.2
0.2
50
61
44
13
≥ +25°C are guaranteed
3.465
1.890
MAX
28.5
301
3.6
0.5
58
50
A
= +25°C.)
UNITS
%FS
mW
mA
mA
mA
µW
V
5