max5890 Maxim Integrated Products, Inc., max5890 Datasheet - Page 12

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max5890

Manufacturer Part Number
max5890
Description
Max5890 14-bit, 600msps, High-dynamic-performance Dac With Lvds Inputs
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
Grounding and power-supply decoupling strongly influ-
ence the MAX5890 performance. Unwanted digital
crosstalk coupling through the input, reference, power
supply, and ground connections affects dynamic per-
formance. High-speed, high-frequency applications
require closely followed proper grounding and power-
supply decoupling. These techniques reduce EMI and
internal crosstalk that can significantly affect the
MAX5890 dynamic performance.
Use a multilayer PCB with separate ground and power-
supply planes. Run high-speed signals on lines directly
above the ground plane. Keep digital signals as far
away from sensitive analog inputs and outputs, refer-
ence input sense lines, common-mode inputs, and
clock inputs as practical. Use a symmetric design of
clock input and the analog output lines to minimize
2nd-order harmonic-distortion components, thus opti-
mizing the DAC’s dynamic performance. Keep digital
signal paths short and run lengths matched to avoid
propagation delay and data skew mismatches.
The MAX5890 requires five separate power-supply
inputs for analog (AV
(DV
Decouple each AV
DV
to the device as possible with the shortest possible con-
nection to the respective ground plane (Figure 7).
Connect all of the 3.3V supplies together at one point
with ferrite beads to minimize supply noise coupling.
Decouple all five power-supply voltages at the point they
enter the PCB with tantalum or electrolytic capacitors.
Ferrite beads with additional decoupling capacitors
forming a pi network can also improve performance.
Similarly, connect all 1.8V supplies together at one point
with ferrite beads.
14-Bit, 600Msps, High-Dynamic-Performance
DAC with LVDS Inputs
Figure 6. Differential Output Configuration
12
DATA INPUTS
Grounding, Bypassing, and Power-Supply
DD1.8
DD1.8
D0–D13
______________________________________________________________________________________
LVDS
input with a separate 0.1µF capacitor as close
and DV
DD3.3
DD3.3
MAX5890
AGND
, AV
), and clock (AV
DD1.8
DD1.8
and AV
OUTP
OUTN
, AV
Considerations
CLK
DD3.3
, DV
CLK
25Ω
50Ω
25Ω
) circuitry.
DD3.3
), digital
, and
OUTP
OUTN
The analog and digital power-supply inputs AV
AV
voltage range. The analog and digital power-supply
inputs AV
supply voltage range.
The MAX5890 is packaged in a 68-pin QFN-EP package
with exposed paddle, providing optimized DAC AC per-
formance. The exposed pad must be soldered to the
ground plane of the PCB. Thermal efficiency is not the
key factor, since the MAX5890 features low- power oper-
ation. The exposed pad ensures a solid ground connec-
tion between the DAC and the PCB’s ground layer.
The data converter die attaches to an EP lead frame
with the back of this frame exposed at the package
bottom surface, facing the PCB side of the package.
This allows for a solid attachment of the package to the
PCB with standard infrared (IR) reflow soldering tech-
niques. A specially created land pattern on the PCB,
matching the size of the EP (6mm x 6mm), ensures the
proper attachment and grounding of the DAC. Place
vias into the land area and implement large ground
Figure 7. Recommended Power-Supply Decoupling and
Bypassing Circuitry
CLK
BYPASSING—DAC LEVEL
DATA INPUTS
*FERRITE BEADS
, and DV
D0–D13
DD1.8
LVDS
DD3.3
and DV
1.8V VOLTAGE SUPPLY
*
*
AV
AV
allow a 3.135V to 3.465V supply
3.3V VOLTAGE SUPPLY
DD3.3
DD1.8
DD1.8
0.1µF
0.1µF
MAX5890
*
*
DV
DV
DD3.3
DD1.8
allow a 1.71V to 1.89V
0.1µF
0.1µF
AV
*
CLK
OUTP
OUTN
0.1µF
DD3.3
,

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