max5858 Maxim Integrated Products, Inc., max5858 Datasheet - Page 21

• Manufacturer Part Number: max5858
• Description: Max5858 Dual, 10-bit, 300msps, Current-output Dac With 4x/2x/1x Interpolation Filters
• Manufacturer: Maxim Integrated Products, Inc.

respectively). Provide separate analog, digital, and
clock ground sections on the PC board with only one
point connecting the three planes. The ground connec-
tion points should be located underneath the device
and connected to the exposed paddle. Run digital sig-
nals above the digital ground plane and analog/clock
signals above the analog/clock ground plane. Digital
signals should be kept away from sensitive analog,
clock, and reference inputs. Keep digital signal paths
short and metal trace lengths matched to avoid propa-
gation delay and data skew mismatch.
The MAX5858 includes three separate power-supply
inputs: analog (AV
(CV
branch out to three separate power-supply lines (AV
DV
Filter each power-supply line to the respective return
line using LC filters comprising ferrite beads and 10µF
capacitors. Filter each supply input locally with 0.1µF
ceramic capacitors to the respective return lines.
Note: To maintain the dynamic performance of the
Electrical Characteristics, ensure the voltage differ-
ence between DV
exceed 150mV.
48-lead TQFP-EP:
Keep the device junction temperature below +125°C to
meet specified electrical performance. Lower the
power-supply voltage to maintain specified perfor-
mance when the DAC update rate approaches
300Msps and the ambient temperature equals +85°C.
The MAX5858 is packaged in a 48-pin TQFP-EP pack-
age, providing greater design flexibility, increased ther-
mal efficiency, and optimized AC performance of the
DAC. The EP enables the implementation of grounding
techniques, which are necessary to ensure highest per-
formance operation.
In this package, the data converter die is attached to
an EP leadframe with the back of this frame exposed at
the package bottom surface, facing the PC board side
of the package. This allows a solid attachment of the
package to the PC board with standard infrared (IR)-
flow soldering techniques. A specially created land pat-
tern on the PC board, matching the size of the EP (5mm
✕
of the DAC. Designing vias* into the land area and
*Vias connect the land pattern to internal or external copper planes.
Dual, 10-Bit, 300Msps, Current-Output DAC with
5mm), ensures the proper attachment and grounding
DD
DD
Thermal Characteristics and Packaging
, CV
). Use a single linear regulator power source to
DD
) and returns (AGND, DGND, CGND).
______________________________________________________________________________________
DD
θ
DD
JA
, AV
), digital (DV
= 37°C/W
DD
, and CV
Thermal Resistance
DD
DD
), and clock
does not
4x/2x/1x Interpolation Filters
DD
,
implementing large ground planes in the PC board
design will allow for highest performance operation of
the DAC. Use an array of 3
(≤0.3mm diameter per via hole and 1.2mm pitch
between via holes) for this 48-pin TQFP-EP package.
Commonly used in combination with wideband code-
division multiple-access (WCDMA), ACLR reflects the
leakage power ratio in dB between the measured
power within a channel relative to its adjacent channel.
ACLR provides a quantifiable method of determining
out-of-band spectral energy and its influence on an
adjacent channel when a bandwidth-limited RF signal
passes through a nonlinear device.
THD is the ratio of the RMS sum of all essential harmon-
ics (within a Nyquist window) of the input signal to the
fundamental itself. This can be expressed as:
where V
V
monics.
SFDR is the ratio of RMS amplitude of the carrier fre-
quency (maximum signal component) to the RMS value
of their next-largest spectral component. SFDR is usu-
ally measured in dBc with respect to the carrier fre-
quency amplitude or in dB FS with respect to the DAC’s
full-scale range. Depending on its test condition, SFDR
is observed within a predefined window or to Nyquist.
A series of equally spaced tones are applied to the DAC
with one tone removed from the center of the range.
MTPR is defined as the worst-case distortion (usually a
3rd-order harmonic product of the fundamental frequen-
cies), which appears as the largest spur at the frequency
of the missing tone in the sequence. This test can be per-
formed with any number of input tones; however, four and
eight tones are among the most common test conditions
for CDMA- and GSM/EDGE-type applications.
N
THD
are the amplitudes of the 2nd through Nth order har-
=
1
is the fundamental amplitude, and V
20
Adjacent Channel Leakage Ratio (ACLR)
Dynamic Performance Parameter
×
Spurious-Free Dynamic Range (SFDR)
log



Total Harmonic Distortion (THD)
(
V
Multitone Power Ratio (MTPR)
2
2
+
V
3
2
✕
+
3 (or greater) vias
V
4
2
... ...
+
Definitions
VN
2
2
through
)
/
V
1



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