max555ccbtd Maxim Integrated Products, Inc., max555ccbtd Datasheet - Page 5

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max555ccbtd

Manufacturer Part Number
max555ccbtd
Description
Max555 300msps, 12-bit Dac With Complementary Voltage Outputs
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
Figure 1’s functional diagram shows the MAX555’s three
major divisions: a digital section, a control-amplifier sec-
tion, and a resistor-divider network. The digital section
consists of a master/slave register, decoding logic, and
current switches. The control-amplifier section includes a
control amplifier and an array of 23 current sources divid-
_______________Detailed Description
28, 29, 31–38, 48,
9, 10, 11, 13, 39,
1, 14, 16–19, 27,
2, 6, 54, 60
49, 64
46, 58
21, 22
24, 25
40, 41
42, 43
44, 45
7, 53
PIN
12
15
20
23
26
30
47
50
51
52
55
56
57
59
61
62
63
3
4
5
8
_______________________________________________________________________________________
ALTCOMPIB
ALTCOMPC
LOOPCRNT
ROFFSET
BYPASS
NAME
AGND
DGND
LBIAS
LGND
REF/2
VOUT
VOUT
DV
AV
N.C.
CLK
CLK
D10
D11
REF
D8
D9
D0
D1
D2
D3
D4
D5
D6
D7
EE
EE
Analog Ground. Note: Exposed pad on the back of the package must be connected to
AGND.
Digital Ground
Data Bit 8 (ECL Input)
Data Bit 9 (ECL Input)
-5.2V Digital Power Supply
No Connection
Ladder-Bias Alternate Compensation Output. Connect bypass capacitor to AV
Control-Amplifier PTAT Reference Compensation Input. Connect bypass capacitor to AV
Analog Reference Voltage Center-Tap Input
-5.2V Analog Power Supply
Test Node. Must connect to AGND.
PTAT-IB Reference Compensation Output. Connects bypass capacitor to AV
Complementary DAC Output
Data Bit 0 (ECL Input)—LSB
Data Bit 1 (ECL Input)
Data Bit 2 (ECL Input)
Data Bit 3 (ECL Input)
Complementary Clock Input (ECL Input)
Data Bit 4 (ECL Input)
Data Bit 5 (ECL Input)
Data Bit 6 (ECL Input)
Data Bit 7 (ECL Input)
Data Bit 10 (ECL Input)
Data Bit 11 (ECL Input)—MSB
Offset Compensation Input
Analog Reference Voltage Inputs (Kelvin Connection)
Ladder Ground
DAC Output
Clock Input (ECL Input)
Disables Latching of Data when High (ECL Input)
Complementary Voltage Outputs
300Msps, 12-Bit DAC with
ed into three groups. The resistor divider scales the cur-
rents from these groups to achieve the correct binary
weighting at the output. The output of the resistor-divider
network is laser trimmed to 50Ω, a key feature for driving
into controlled impedance transmission lines.
The first group of current sources comprises the six
MSBs, D11–D6 (resulting in 15 identical, plus two binary
FUNCTION
Pin Description
EE
EE
.
.
EE
.
5

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