max5591 Maxim Integrated Products, Inc., max5591 Datasheet - Page 18

• Manufacturer Part Number: max5591
• Description: Buffered, Fast-settling, Octal, 12/10/8-bit, Voltage-output Dacs
• Manufacturer: Maxim Integrated Products, Inc.

Buffered, Fast-Settling, Octal, 12/10/8-Bit,
Voltage-Output DACs
Tables 2a, 2b, and 2c provide all of the serial-interface
programming commands for the MAX5590–MAX5595.
Table 2a shows the basic DAC programming com-
mands, Table 2b gives the advanced-feature program-
ming commands, and Table 2c provides the 24-bit
read commands. Figures 3 and 4 provide the serial-
interface diagrams for read and write operations.
Figure 3. MICROWIRE and SPI Single DAC Writes (CPOL = 0, CPHA = 0 or CPOL = 1, CPHA = 1)
Figure 4. DSP and SPI Single DAC Writes (CPOL = 0, CPHA = 1 or CPOL = 1, CPHA = 0)
18
Serial-Interface Programming Commands
______________________________________________________________________________________
SCLK
SCLK
SCLK
SCLK
MICROWIRE OR SPI (CPOL = 0, CPHA = 0) 8-BIT CONTROL DATA OR 12-BIT DAC DATA WRITE:
SPI (CPOL = 1, CPHA = 1) 8-BIT CONTROL DATA OR 12-BIT DAC DATA WRITE:
DIN
DIN
DSP OR SPI (CPOL = 0, CPHA = 1) 8-BIT CONTROL DATA OR 12-BIT DAC DATA WRITE:
DSP OR SPI (CPOL = 1, CPHA = 0) 8-BIT CONTROL DATA OR 12-BIT DAC DATA WRITE:
DIN
DIN
CS
CS
CS
CS
TCLK, SCLK, OR CLKX
MICROWIRE
C3
C3
DSP
C3
C3
TFS OR FSX
DT OR DX
C2
C2
C2
C2
V
V
SO
I/O
SK
DD
SS
C1
C1
C1
C1
V
DD
C0
C0
C0
C0
CS MUST REMAIN LOW BETWEEN BYTES ON A 16-BIT WRITE OPERATION
CS MUST REMAIN LOW BETWEEN BYTES ON A 16-BIT WRITE OPERATION
CS MUST REMAIN LOW BETWEEN BYTES ON A 16-BIT WRITE OPERATION
CS MUST REMAIN LOW BETWEEN BYTES ON A 16-BIT WRITE OPERATION
DV
DSP
SCLK
DIN
CS
DGND
DSP
SCLK
DIN
CS
D11
D11
D11
D11
DD
MAX5590–
MAX5590–
MAX5595
MAX5595
D10
D10
D10
D10
D9
D9
D9
D9
D8
D8
D8
D8
The MAX5590–MAX5595 contain a 16-bit shift register
that is followed by a 12-bit input register and a 12-bit
DAC register for each channel (see the Functional
Diagrams). Tables 3, 4, and 5 highlight a few of the
commands that handle the loading of the input and
DAC registers. See Table 2a for all DAC programming
commands.
D7
D7
D7
D7
D6
D6
D6
D6
SPI OR QSPI
SPI OR QSPI
D5
D5
D5
D5
Loading Input and DAC Registers
SS OR I/O
SS OR I/O
D4
D4
MOSI
D4
D4
MOSI
SCK
V
SCK
V
DD
SS
COMMAND TAKES EFFECT HERE
COMMAND TAKES EFFECT HERE
COMMAND TAKES EFFECT HERE
COMMAND TAKES EFFECT HERE
ONLY IF SCLK COUNT = N
ONLY IF SCLK COUNT = N
ONLY IF SCLK COUNT = N
ONLY IF SCLK COUNT = N
D3
D3
D3
D3
V
DD
D2
D2
D2
D2
DV
DSP
SCLK
DIN
CS
DGND
DSP
SCLK
DIN
CS
DD
D1
D1
D1
D1
MAX5590–
MAX5590–
MAX5595
MAX5595
✕
✕
✕
✕
16
16
16
16
D0
D0
D0
D0