max5290beudt Maxim Integrated Products, Inc., max5290beudt Datasheet - Page 29

• Manufacturer Part Number: max5290beudt
• Description: Buffered, Fast-settling, Dual, 12-/10-/8-bit, Voltage-output Dacs
• Manufacturer: Maxim Integrated Products, Inc.

UPIO1 and UPIO2 can each be configured as a gener-
al-purpose logic input (GPI), a general-purpose logic-
low output (GPOL), or general-purpose logic-high
output (GPOH).
The GPI can detect interrupts from µPs or microcon-
trollers. It provides three functions:
1) Sample the signal at GPI at the time of the read
2) Detect whether or not a falling edge has occurred
3) Detect whether or not a rising edge has occurred
RTP1, LF1, and LR1 represent the data read from
UPIO1. RTP2, LF2, and LR2 represent the data read
from UPIO2.
To issue a read command for the UPIO configured as
GPI, use the command in Table 23.
Once the command is issued, RTP1 and RTP2 provide
the real-time status (0 or 1) of the inputs at UPIO1 or
UPIO2, respectively, at the time of the read. If LF2 or
Table 23. GPI Read Command
X = Don’t care.
Table 24. Unipolar Code Table (Gain = +1)
MSB
1111
1000
1000
0111
0000
0000
DOUTRB
DATA
(RTP1 and RTP2).
since the last read or reset (LF1 and LF2).
since the last read or reset (LR1 and LR2).
DIN
DAC CONTENTS
1111
0000
0000
1111
0000
0000
1
X
Buffered, Fast-Settling, Dual, 12-/10-/8-Bit,
CONTROL BITS
1111
0001
0000
1111
0001
0000
______________________________________________________________________________________
X
LSB
1
1
X
+V
X
1
REF
+V
+V
+V
ANALOG OUTPUT
(2048 / 4096) = V
+V
REF
REF
REF
X
0
REF
GPI, GPOL, GPOH
(4095 / 4096)
(2049 / 4096)
(2047 / 4096)
(1 / 4096)
0
X
0
REF
X
1
/ 2
X
X
LF1 is one, then a falling edge has occurred on the
UPIO1 or UPIO2 input since the last read or reset. If
LR2 or LR1 is one, then a rising edge has occurred
since the last read or reset.
GPOL outputs a constant logic low, and GPOH outputs
a constant logic high (see Figure 6).
Use the TOGG input to toggle a DAC output between
the values in the input register and DAC register. A
delay of greater than 100ns from the end of the previ-
ous write command is required before the TOGG signal
can be correctly switched between the new value and
the previously stored value. When TOGG = 0, the out-
put follows the information in the input registers. When
TOGG = 1, the output follows the information in the
DAC register (Figure 5).
The MAX5290–MAX5295 have two settling-time-mode
options: FAST (3µs max at 12 bits) and SLOW (6µs max
at 12 bits). To select the FAST mode, drive FAST low,
and to select SLOW mode, drive FAST high. This over-
rides (not overwrites) the SPDA and SPDB bit settings.
Figure 7. Unipolar Output Circuit
X
X
REF
Voltage-Output DACs
DATA BITS
X
X
MAX5290
DAC_
RTP2
X
LF2
X
LR2
X
RTP1
X
V
CODE IS THE DAC_ INPUT
CODE (0 TO 4095 DECIMAL).
OUT_
OUT_
= V
LF1
REF
X
x CODE / 4096
TOGG
FAST
LR1
X
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