max5115eept Maxim Integrated Products, Inc., max5115eept Datasheet - Page 15

• Manufacturer Part Number: max5115eept
• Description: Nonvolatile, Quad, 8-bit Dacs With 2-wire Serial Interface
• Manufacturer: Maxim Integrated Products, Inc.

Mute drives the selected DAC output to the correspond-
ing REFL_ voltage. The volatile DAC registers retain data
and the output returns to its previous state when mute is
disabled. The MAX5116 also features an asynchronous
MUTE input that mutes all DACs simultaneously.
The volatile and nonvolatile registers remain active
while the MAX5115/MAX5116 are in mute and power-
down modes. Writing to or reading from the volatile or
nonvolatile registers does not remove the MAX5115/
MAX5116 from mute or power-down mode. Writing or
transferring data to the volatile registers while the
Table 2. Volatile and Nonvolatile Write
Selection
Table 4. Write-Command Summary
*This option is only valid for a write to all volatile registers.
Write VREG_
Write All
VREG_*
Write
NVREG_
Write VREG_
and NVREG_
Transfer
NVREG_ to
VREG_
Nonvolatile, Quad, 8-Bit DACs with 2-Wire Serial
NONVOLATILE
COMMAND
(NV)
0
0
1
1
S
T
A
R
T
S
S
S
S
S
VOLATILE
______________________________________________________________________________________
ADDRESS
(V)
BYTE
0
1
0
1
R/W
0
0
0
0
0
Transfer data from NVREG_ to
VREG_
Write to VREG_
Write to NVREG_
Write to NVREG and VREG_
A
C
K
C
7
0
0
0
0
0
FUNCTION
C
6
0
0
0
0
0
COMMAND BYTE
C
5
0
0
1
1
0
C
4
1
1
0
1
0
C
3
R
3
R
3
R
3
R
3
1
C
2
R
2
R
2
R
2
R
2
1
C
R
1
R
1
R
1
R
1
1
1
C
R
0
R
0
R
0
R
0
0
1
device is muted or powered down updates the DAC
outputs to the new state upon exiting mute or power-
down mode.
Separate nonvolatile and volatile control registers store
and update the state of the mute/power-down mode for
each DAC. Tables 7 and 8 show how to access and
control each register. Register access is gained by set-
ting control bits C3–C0 to 0100. Bits C5 and C4 indi-
cate whether the nonvolatile or volatile control register
is accessed. The volatile register maintains data while
Table 3. DAC Write Selection
*This option is only valid for a write to all volatile registers.
Mute/Power-Down Register and Operation
R3
A
C
K
0
0
0
0
1
MSB
D
7
R2
0
0
0
0
1
D
6
D
5
DATA BYTE
R1
0
0
1
1
1
D7–D0
D7–D0
D7–D0
D7–D0
D
4
—
D
3
R0
0
1
0
1
1
D
2
D
1
Interface
LSB
D
0
FUNCTION
All DACs*
DAC0
DAC1
DAC2
DAC3
A
C
K
STOP
P
P
P
P
P
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