max5188beeit Maxim Integrated Products, Inc., max5188beeit Datasheet - Page 11

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max5188beeit

Manufacturer Part Number
max5188beeit
Description
Dual, 8-bit, 40mhz, Current/voltage, Alternate-phase Output Dacs
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
Both internal DAC cells write to their outputs in alternate
phase (Figure 4). The input latch of the first DAC
(DAC1) is loaded after the clock signal transitions high.
When the clock signal transitions low, the input latch of
the second DAC (DAC2) is loaded. The contents of the
first input latch are shifted into the DAC1 register on the
rising edge of the clock; the contents of the second
input latch are shifted into the input register of DAC2 on
the falling edge of the clock. Both outputs are updated
on alternate phases of the clock.
The MAX5188 outputs are designed to supply 1mA full-
scale output currents into 400Ω loads in parallel with a
capacitive load of 5pF. The MAX5191 features integrat-
Figure 5a. Integral Nonlinearity
Figure 5c. Offset Error
3
2
1
0
7
6
5
4
3
2
1
0
000
000
ACTUAL
OFFSET
POINT
001
IDEAL OFFSET
POINT
______________________________________________________________________________________
DIAGRAM
ACTUAL
010
001
DIGITAL INPUT CODE
DIGITAL INPUT CODE
AT STEP
001 (1/4 LSB )
011
OFFSET ERROR
(+1 1/4 LSB)
Dual, 8-Bit, 40MHz, Current/Voltage,
100
Timing Information
010
AT STEP
011 (1/2 LSB )
101
IDEAL DIAGRAM
110
011
111
Alternate-Phase Output DACs
Outputs
ed 400Ω resistors that restore the array currents into
proportional, differential voltages of 400mV. These dif-
ferential output voltages can then be used to drive a
balun transformer or a low-distortion, high-speed oper-
ational amplifier to convert the differential voltage into a
single-ended voltage.
Integral nonlinearity (INL) (Figure 5a) is the deviation of
the values on an actual transfer function from either a
best-straight-line fit (closest approximation to the actual
transfer curve) or a line drawn between the endpoints
Figure 5b. Differential Nonlinearity
Figure 5d. Gain Error
6
5
4
3
2
1
0
000
7
6
5
4
0
000
Applications Information
IDEAL DIAGRAM
001
100
GAIN ERROR
(-1 1/4 LSB)
DIGITAL INPUT CODE
010
IDEAL FULL-SCALE OUTPUT
DIGITAL INPUT CODE
Performance Definitions
101
1 LSB
011
DIFFERENTIAL
LINEARITY ERROR (+1/4 LSB)
Static and Dynamic
DIFFERENTIAL LINEARITY
ERROR (-1/4 LSB)
100
Integral Nonlinearity
110
FULL-SCALE
101
OUTPUT
ACTUAL
1 LSB
111
11

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