max5978 Maxim Integrated Products, Inc., max5978 Datasheet - Page 29

• Manufacturer Part Number: max5978
• Description: 0 To 16v, Hot-swap Controller With 10-bit Current, Voltage Monitor, And 4 Led Drivers
• Manufacturer: Maxim Integrated Products, Inc.

The contents of a buffer can be retrieved as a block read
of either fifty 10-bit values (spanning 2 bytes each) or of
50 high-order bytes, depending on the per-signal bit set-
tings of register cbufrd_hibyonly (see Table 42).
If the circular buffer contents are retrieved as 10-bit
data, the first byte read-out is the high-order 8 bits of the
10-bit sample, and the second byte read-out contains
the 2 least-significant bits (LSBs) of the sample. This is
repeated for each of the 50 samples in the buffer. Thus,
2 bytes must be read for each 10-bit sample retrieved.
Conversely, if the buffer contents are retrieved as 8-bit
data, then each byte read-out contains the 8 MSBs of
each successive sample. It is important to remember
that in 10-bit mode, 100 bytes must be read to extract the
entire buffer contents, but in 8-bit mode, only 50 bytes
must be read.
The circular buffer system has a user-programmable
“stop delay” that specifies a certain number of sample
cycles to continue recording to the buffer after a shut-
down occurs. This delay value is stored in register
cbuf_dly_stop[5:0] (see Table 43).
Table 40. Circular Buffer Read Addresses
Table 41. Circular Buffer Control Register Format
Table 42. Circular Buffer Resolution Register Format
Description:
Register Title:
Register Address:
Description:
Register Title:
Register Address:
ADDRESS
Bit 7
Bit 7
—
—
R
R
0x46
0x47
Current, Voltage Monitor, and 4 LED Drivers
0 to 16V, Hot-Swap Controller with 10-Bit
Bit 6
Bit 6
—
—
R
R
cbuf_ba_v
cbuf_ba_i
NAME
Circular buffer run-stop control register (per-buffer control: 1 = run, 0 = stop)
cbuf_chx_store
0x19
Circular buffer read-out resolution: high-order byte only, or 8-2 split 10-bit data
(per-buffer control: 1 = high-order byte output, 0 = full-resolution 10-bit output)
cbufrd_hibyonly
0x3F
Bit 5
Bit 5
—
R
—
R
Base address for voltage buffer block read
Base address for current buffer block read
Bit 4
Bit 4
—
R
—
R
Unused
Unused
R/W
Bit 3
Bit 3
R/W
The default (reset) value of the buffer stop delay is
25 samples, which means that an equal number of
samples are stored in the buffer preceding and follow-
ing the moment of the shutdown event. The buffer stop
delay is analogous to an oscilloscope trigger delay
because it allows the device to record what happened
both immediately before and after a shutdown. In other
words, when the contents of a circular buffer are read
out of the device, the shutdown event is by default
located in the middle of the recorded data. The balance
of data before and after an event can be altered by writ-
ing a different value (between 0 and 50) to the buffer
stop-delay register.
In the event of an overcurrent, undervoltage, or overvolt-
age condition that results in the shutdown of the hot-
swap channel, the device remains latched off.
To restart the latched-off channel, the user must either
cycle power to the IN input, or toggle the ON pin, EN1
bit, or the EN2 bit.
Unused
Bit 2
R/W
Unused
R/W
Bit 2
DESCRIPTION
Ch0_i_run
Latched-Off Fault Management
R/W
Bit 1
i_res
R/W
Bit 1
Ch0_v_run
R/W
Bit 0
v_res
R/W
Bit 0
RESET
VALUE
RESET
VALUE
0x0F
0x0F
—
—
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