max5093 Maxim Integrated Products, Inc., max5093 Datasheet - Page 20
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max5093
Manufacturer Part Number
max5093
Description
4v To 72v Input Ldos With Boost Preregulator
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
1.MAX5093.pdf
(24 pages)
Available stocks
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Part Number
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Quantity
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Part Number:
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Manufacturer:
MAXIM/美信
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The MAX5092_/MAX5093_ high input voltage (+72V
max) provides up to 250mA of current from OUT.
Package power-dissipation limits the amount of output
current available for a given input/output voltage and
ambient temperature. Figure 8 depicts the maximum
power-dissipation curve for the devices. The graph
assumes that the exposed metal pad of the IC package
is soldered to the PCB copper according to the JEDEC
51 standard (multilayer board). Use Figure 8 to deter-
mine the allowable package dissipation for a given
ambient temperature. Alternately, use the following for-
mula to calculate the allowable package dissipation
(P
For T
For +70°C < T
where +70°C < T
package thermal derating. After determining the allow-
able package dissipation, calculate the maximum out-
put current (I
where P
tion and P
4V to 72V Input LDOs with Boost Preregulator
20
Figure 8. MAX5092/MAX5093 Package Power Dissipation
DISS
______________________________________________________________________________________
A
) in watts:
≤ +70°C:
Maximum Output Current (I
DISS
LOSS(BST)
P
I
DISS
OUT MAX
3.0
2.5
2.0
1.5
1.0
0.5
OUT_MAX
0
is the allowable package power dissipa-
A
-40
≤ +125°C:
_
= 2.67 - (0.0333 x (T
-25
MAXIMUM POWER DISSIPATION
A
vs. AMBIENT TEMPERATURE
-10
≤ +125°C and 0.0333W/°C is the
is the boost converter power loss.
P
AMBIENT TEMPERATURE (°C)
) using the following formula:
=
DISS
5
P
DISS
20
= 2.67
V
35
IN
−
50
P
−
LOSS BST
V
65
OUT
80
A
(
- 70))
95
)
110
OUT_MAX
125
)
P
tion and the LDO itself. The boost converter loss
P
the Boost Converter Power Loss graphs in the Typical
Operating Characteristics to estimate the losses at a
given V
ambient temperature of +105°C, P
by up to 20% due to higher R
es of the internal boost converter MOSFET. (Note:
I
Good PCB layout and routing are required in high-fre-
quency switching power supplies to achieve proper
regulation and stability. It is strongly recommended that
the evaluation kit PCB layouts be followed as closely as
possible. Refer to the MAX5092 EV kit for an example
layout. Follow these guidelines for good PCB layout:
1) For SGND, use a large copper plane under the IC
2) Isolate the power components and high-current
3) Keep the high-current paths short, especially at the
4) Connect the return terminals of input capacitors
5) Ensure that the feedback connections are short and
6) Route high-speed switching nodes away from the
OUT_MAX
DISS
LOSS(BST)
and solder it to the exposed paddle. To effectively
use this copper area as a heat exchanger between
the PCB and ambient, expose this copper area on
the top and bottom side of the PCB. Do not make a
direct connection from the EP copper plane to pin 3
(SGND) underneath the IC so as to minimize
ground bounce.
path from the sensitive analog circuit.
ground terminals. This practice is essential for sta-
ble, jitter-free operation.
and boost output capacitors to the PGND_BST
power ground plane. Connect the power ground
(PGND_BST) and signal ground (SGND) planes
together at the negative terminal of the input capac-
itors. Do not connect them anywhere else. Connect
PGND_LDO ground plane to SGND ground plane
at a single point.
direct. Ensure a low-impedance path between
BSFB and SGND to limit the transient at BSFB to
100mV.
sensitive analog areas. Use the internal PCB layer
for SGND as an EMI shield to keep radiated noise
away from the IC, feedback dividers, and bypass
capacitors.
includes the losses in the boost converter opera-
IN
and V
must be less than 250mA).
, depends on V
BSOUT
at room temperature. At a higher
PCB Layout Guidelines
IN
DS-ON
, V
BSOUT
LOSS(BST)
and switching loss-
, and I
increases
OUT
. See