cdp68hc68t1 Intersil Corporation, cdp68hc68t1 Datasheet - Page 12

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cdp68hc68t1

Manufacturer Part Number
cdp68hc68t1
Description
Cmos Serial Real-time Clock With Ram And Power Sense/control
Manufacturer
Intersil Corporation
Datasheet

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Alarm
The output of the alarm comparator is enabled when this bit
is set high. When a comparison occurs between the
seconds, minutes and hours time and alarm counters, the
interrupt output is activated. When loading the time counters,
this bit should be set low to avoid a false interrupt. This is not
required when loading the alarm counters. See "Functional
Description", INT for explanation of alarm delay on page 10.
CLOCK CONTROL REGISTER (Write/Read) - Address 31H
INTERRUPT CONTROL REGISTER (Write/Read) - Address 32H
NOTE: All bits are reset by power-on reset.
WATCHDOG
START
STOP
D0 - D3 VALUE
D7
D7
10
11
12
13
14
15
0
1
2
3
4
5
6
7
8
9
POWER
DOWN
XTAL
LINE
D6
D6
12
PERIODIC INTERRUPT
OUTPUT FREQUENCY
POWER
SENSE
XTAL
SEL
D5
D5
1
50Hz or 60Hz
TABLE 3. PERIODIC INTERRUPT OUTPUT
2048Hz
1024Hz
Disable
Minute
512Hz
256Hz
128Hz
64Hz
32Hz
16Hz
Hour
8Hz
4Hz
2Hz
1Hz
Day
ALARM
CDP68HC68T1
XTAL
SEL
D4
D4
0
Periodic Select
The value in these 4 bits will select the frequency of the
periodic output. (See Table 3).
50Hz
60Hz
D3
D3
XTAL
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
CLK OUT
FREQUENCY TIME BASE
D2
D2
PERIODIC SELECT
2
CLK OUT
D1
D1
1
LINE
X
X
X
X
X
X
CLK OUT
D0
D0
October 29, 2007
0
FN1547.8

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