nbxdba012 ON Semiconductor, nbxdba012 Datasheet - Page 3

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nbxdba012

Manufacturer Part Number
nbxdba012
Description
3.3 V, 106.25 Mhz 212.5 Mhz Lvpecl Clock Oscillator
Manufacturer
ON Semiconductor
Datasheet

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NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
2. Measurement taken with outputs terminated with 50 ohm to V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
3. Measurement taken with outputs terminated with 50 ohm to V
4. Parameter guarantees 10 years of aging. Includes initial stability at 25°C, shock, vibration, and first year aging.
Table 6. DC CHARACTERISTICS
Table 7. AC CHARACTERISTICS
t
DUTY_CYCLE
Symbol
Symbol
f
V
F
CLKOUT
t
t
OE/OD
OUTPP
V
t
t
V
NOISE
jit
I
V
V
jitter
start
I
DD
I
Df
board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
t
t
board with maintained transverse airflow greater than 500 Ifpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
(F)
IH
OH
IL
OL
R
F
IH
IL
(See Figures 3 and 4)
Power Supply Current (Note 2)
OE and FSEL Input HIGH Voltage
OE and FSEL Input LOW Voltage
Input HIGH Current
Input LOW Current
Output HIGH Voltage (Note 2)
Output LOW Voltage (Note 2)
Output Voltage Amplitude (Note 2)
Output Clock Frequency
Frequency Stability - NBXDBA012
Phase-Noise Performance
f
RMS Phase Jitter
Cycle to Cycle, RMS
Cycle to Cycle, Peak-to-Peak
Period, RMS
Period, Peak-to-Peak
Output Enable/Disable Time
Output Clock Duty Cycle
(Measured at Cross Point)
Output Rise Time (20% and 80%)
Output Fall Time (80% and 20%)
Start-up Time
Aging
CLKout
= 106.25 MHz/212.5 MHz
Characteristic
Characteristic
(V
(V
DD
DD
= 3.3 V ± 10%, GND = 0 V, T
= 3.3 V ± 10%, GND = 0 V, T
FSEL
FSEL
OE
OE
http://onsemi.com
(See Figures 5 and 6)
(See Figures 5 and 6)
Every Year After 1
NBXDBA012
100 kHz of Carrier
10 MHz of Carrier
12 kHz to 20 MHz
100 Hz of Carrier
10 kHz of Carrier
1 MHz of Carrier
V
V
Conditions
1 kHz of Carrier
10,000 Cycles
10,000 Cycles
FSEL = HIGH
DD
DD
FSEL = LOW
1000 Cycles
1000 Cycles
Conditions
DD
DD
(Note 4)
1
= 3.3 V
= 3.3 V
-2 V.
-2 V. See Figure 7.
st
3
Year
A
A
= -40°C to +85°C)
= -40°C to +85°C)
st
GND - 300
V
V
DD
DD
2000
-100
-100
-100
-100
2155
1355
Min.
-1945
-1145
Min.
48
-108/-101
-126/-120
-133/-126
-133/-127
-140/-133
-162/-160
Typ.
700
106.25
82
212.5
Typ.
250
250
0.4
12
50
2
1
8
1
V
V
DD
DD
Max.
+100
+100
+100
+100
2405
1700
V
100
800
-1600
Max.
DD
-895
±50
200
400
400
0.9
30
20
52
8
4
5
3
1
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Units
Units
MHz
ppm
ppm
ppm
mA
mV
mV
mV
mV
mV
ms
mA
mA
ps
ps
ps
ps
ps
ns
ps
ps
%

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