hsp43881 ETC-unknow, hsp43881 Datasheet - Page 21

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hsp43881

Manufacturer Part Number
hsp43881
Description
Digital Filter
Manufacturer
ETC-unknow
Datasheet

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Waveforms
† SUM-25, COUTO-7, TCCO are assumed not to be in high-
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation
P. O. Box 883, Mail Stop 53-204
Melbourne, FL 32902
TEL: (407) 724-7000
FAX: (407) 724-7240
CLK
COUT0-7
SUM0-25
impedance state.
FIGURE 10. SUM0-25, COUT0-7, TCCO OUTPUT DELAYS
SUM0-25
COUT0-7
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
COENB
SENBH
TCCO
SENBL
2.0V
TCCO
FIGURE 12. OUTPUT ENABLE, DISABLE TIMING
CLK
FIGURE 8. CLOCK AC PARAMETERS
2.0V
IMPEDANCE
HIGH
t
CH
1.5V
t
CP
t
OED
1.7V
1.3V
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
2.0V
1.5V
21
t
t
CL
ODC,
t
t
ODD
ODS
2.0V
1.5V
EUROPE
Intersil SA
Mercure Center
100, Rue de la Fusee
1130 Brussels, Belgium
TEL: (32) 2.724.2111
FAX: (32) 2.724.22.05
IMPEDANCE
HIGH
HSP43881
† Input includes: DIN0-7, CIN0-7, DIENB, CIENB, ERASE,
NOTE: AC Testing: Inputs are driven at 3.0V for Logic and “1” and
0.0V for Logic “0”. Input and output timing measurements are made
at 1.5 for both a Logic “1” and “0”. CLK is driven at 4.0 and 0V and
measured at 2.0V.
INPUT
INPUT†
RESET,DCM0-1, ADRO-2, TCS, TCCI, SHADD
CLK
3.0V
0.0V
FIGURE 13. AC TESTING INPUT, OUTPUT WAVEFORM
3.0V
0.0V
FIGURE 11. OUTPUT RISE AND FALL TIMES
t
FIGURE 9. INPUT SETUP AND HOLD
OR
0.8V
2.0V
ASIA
Intersil (Taiwan) Ltd.
7F-6, No. 101 Fu Hsing North Road
Taipei, Taiwan
Republic of China
TEL: (886) 2 2716 9310
FAX: (886) 2 2715 3029
1.5V
1.5V
DEVICE
t
UNDER
IS
2.0V
TEST
t
IH
t
OF
1.5V
1.5V
OUTPUT
4.0V
0.0V

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