74lvt16652 National Semiconductor Corporation, 74lvt16652 Datasheet - Page 3

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74lvt16652

Manufacturer Part Number
74lvt16652
Description
3.3v Abt 16-bit Transceiver/register With Tri-state Outputs
Manufacturer
National Semiconductor Corporation
Datasheet

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Part Number
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OEAB
Functional Description
In the transceiver mode data present at the HIGH imped-
ance port may be stored in either the A or B register or both
The select (SAB
real-time
The examples in Figure 1 demonstrate the four fundamental
bus-management functions that can be performed with the
LVT16652
Data on the A or B data bus or both can be stored in the
internal D flip-flop by LOW to HIGH transitions at the appro-
Truth Table
H
Note The data output functions may be enabled or disabled by various signals at OEAB or OEBA inputs Data input functions are always enabled i e data at the
bus pins will be stored on every LOW to HIGH transition on the clock inputs This also applies to data I O (A and B 8–15) and
OEAB
H
H
H
H
e
L
L
L
X
L
L
L
L
1
Real-Time Transfer
HIGH Voltage Level
1
OEBA
Bus B to Bus A
L
1
CPAB
OEBA
X
H
H
H
H
H
H
X
L
L
L
L
1
CPBA
n
1
X
TL F 12024 – 4
SBA
1
(Note)
SAB
X
CPAB
H or L
H or L
H or L
H or L
n
1
L
L
L
L
L
) controls can multiplex stored and
SBA
X
X
X
e
L
Inputs
1
LOW Voltage Level
1
OEAB
CPBA
H or L
H or L
H or L
H or L
H
L
L
L
L
1
Real-Time Transfer
X
X
X
OEBA
Bus A to Bus B
H
1
1
CPAB
X
SAB
1
X
X
X
X
X
X
X
X
X
H
H
L
CPBA
e
1
X
TL F 12024 – 5
Immaterial
1
SAB
L
SBA
1
X
X
X
X
X
X
H
X
X
H
L
SBA
FIGURE 1
X
1
1
3
L
Input
Input
Input
Not Specified
Output
Output
Input
Output
OEAB
A
e
priate Clock Inputs (CPAB
lect or Output Enable Inputs When SAB and SBA are in the
real time transfer mode it is also possible to store data
without using the internal D flip-flops by simultaneously en-
abling OEAB
reinforces its Input Thus when all other data sources to the
two sets of bus lines are in a HIGH impedance state each
set of bus lines will remain at its last state
X
L
L
0
1
LOW to HIGH Clock Transition
thru A
OEBA
H
X
H
Inputs Outputs
1
Storage
CPAB
7
L
L
X
1
n
CPBA
and OEBA
L
L
X
Input
Not Specified
Output
Input
Input
Input
Output
Output
TL F 12024 – 6
B
1
0
SAB
thru B
X
X
X
1
SBA
X
X
X
n
1
7
n
In this configuration each Output
CPBA
OEAB
H
Isolation
Store A and B Data
Store A Hold B
Store A in Both Registers
Hold A Store B
Store B in Both Registers
Real-Time B Data to A Bus
Store B Data to A Bus
Real-Time A Data to B Bus
Stored A Data to B Bus
Stored A Data to B Bus and
Stored B Data to A Bus
1
n
2 control pins
Transfer Storage
) regardless of the Se-
OEBA
Data to A or B
L
Operating Mode
1
CPAB
H or L
http
1
CPBA
H or L
www national com
TL F 12024 – 7
1
SAB
H
1
SBA
H
1

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