74lvth16952 Fairchild Semiconductor, 74lvth16952 Datasheet
74lvth16952
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74lvth16952 Summary of contents
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... Features Input and output interface capability to systems Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH16952) Live insertion/extraction permitted Power Up/Down high impedance provides glitch-free bus loading Outputs source/sink 32 mA Functionally compatible with the 74 series 16952 ...
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Connection Diagram www.fairchildsemi.com Pin Descriptions Pin Names Description A –A Data Register A Inputs 0 16 B-Register 3-STATE Outputs B –B Data Register B Inputs 0 16 A-Register 3-STATE Outputs CPAB , CPBA Clock Pulse Inputs n n CEA , ...
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Logic Diagram Note: for either byte 1 or byte 2. n Please note that these diagrams are provided only for the understanding of logic operations and should not be used to estimate propagation delays. 3 www.fairchildsemi.com ...
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Absolute Maximum Ratings Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current Supply Current ...
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... Increase in Power Supply Current CC (Note 7) Note 4: Applies to bushold version only (74LVTH16952). Note 5: An external driver must source at least the specified current to switch from LOW-to-HIGH. Note 6: An external driver must sink at least the specified current to switch from HIGH-to-LOW. Note 7: This is the increase in supply current for each input that is at the specified voltage level rather than V ...
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AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PLH t CPBA or CPAB PHL t Output Enable Time PZH PZL t Output Disable Time PHZ ...
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Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS56A 7 www.fairchildsemi.com ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves ...