74lvth16500 Fairchild Semiconductor, 74lvth16500 Datasheet - Page 2

• Manufacturer Part Number: 74lvth16500
• Description: Low Voltage 18-bit Universal Bus Transceivers With 3-state Outputs Preliminary
• Manufacturer: Fairchild Semiconductor

www.fairchildsemi.com
Connection Diagram
Functional Description
For A-to-B data flow, the device operates in the transparent
mode when LEAB is HIGH. When LEAB is LOW, the A
data is latched if CLKAB is held at a HIGH or LOW logic
level. If LEAB is LOW, the A bus data is stored in the latch/
flip-flop on the HIGH-to-LOW transition of CLKAB. Output-
enable OEAB is active-HIGH. When OEAB is HIGH, the
Logic Diagram
2
Pin Descriptions
Function Table
H
X
Note 1: A-to-B data flow is shown: B-to-A flow is similar but uses OEBA,
LEBA, and CLKBA.
Note 2: Output level before the indicated steady-state input conditions
were established.
Note 3: Output level before the indicated steady-state input conditions
were established, provided that CLKAB was LOW before LEAB went LOW.
outputs are active. When OEAB is LOW, the outputs are in
the high-impedance state.
Data flow for B-to-A is similar to that of A-to-B but uses
OEBA, LEBA, and CLKBA. The output enables are com-
plementary (OEAB is active-HIGH and OEBA is active-
LOW).
A
B
CLKAB, CLKBA Clock Pulse Inputs
LEAB, LEBA
OEAB, OEBA
1
1
OEAB
HIGH-to-LOW Clock Transition
HIGH Voltage Level
Immaterial
Pin Names
–A
–B
H
H
H
H
H
H
L
18
18
LEAB
H
H
X
L
L
L
L
Data Register A Inputs/3-STATE Outputs
Data Register B Inputs/3-STATE Outputs
Latch Enable Inputs
Output Enable Inputs
Inputs
CLKAB
L
(Note 1)
Z
H
X
X
X
L
LOW Voltage Level
High Impedance
Description
A
X
H
H
X
X
L
L
Preliminary
B
B
0
0
Output
(Note 2)
(Note 3)
B
Z
H
H
L
L