mc1451a-e ETC-unknow, mc1451a-e Datasheet

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mc1451a-e

Manufacturer Part Number
mc1451a-e
Description
Advanced Brushless Motor Control Chipset
Manufacturer
ETC-unknow
Datasheet
Performance Motion Devices, Inc. 12 Waltham St. Lexington, MA 02421 tel: 781.674.9860 fax: 781.674.9861 www.pmdcorp.com
Features
Commutation Waveforms
Supports 3-phase as well as 2-phase
brushless motors
Performs trajectory generation, servo
loop closure, and commutation
Ultra-smooth sinusoidal commutation
Open or closed loop operation
Software and feature-compatible with
other 1st generation PMD chipsets
Available in 1 or 2 axis configurations
32-bit position, velocity, acceleration and
jerk trajectory profile registers
Choice of S-curve, trapezoidal, or
contoured velocity profile modes
Electronic Gearing
Two travel-limit switches per axis
Choice of PWM or DAC motor output
signals
Easy-to-use packet-oriented command
protocol
Phase A
Phase A
Phase B
Phase B
3-Phase Brushless
2-Phase Brushless
Phase C
Advanced Brushless Motor
Control Chipset
General Description
The MC1231A is a dedicated motion processor which functions
as a complete chip-based motor controller. Packaged in a 2-IC
chipset, this device performs trajectory generation, servo loop
closure, and sinusoidal commutation. The chipset inputs
incremental encoder signals and outputs PWM or
DAC-compatible motor command signals. The MC1231A is
available in a one, or a two-axis configuration.
The MC1231A is functionally similar to other members of
PMD's 1st generation chipset family however it adds the ability
to perform sinusoidal commutation of brushless motors. All of
these devices provide sophisticated motion control capabilities
allowing the creation of complex profile sequences with very low
tracking errors.
Both two and three-phase brushless motors are supported by
the MC1231A. When used with two-phase brushless motors
each phase is separated by 90 degrees. When used with
3-phase brushless motors each phase is separated by 120
degress. The commutation angle is continuously calculated
using the encoder position. User-programmable commutation
parameters allow a very wide range of encoders and motors to
be controlled.
The chipset is controlled by a host processor which interfaces
with the chipset via an 8-bit, bi-directional port. Communications
to/from the chipset consist of packet-oriented messages.
The chipset is packaged in 2 68-pin PLCC packages. Both
chips utilize CMOS technology and are powered by 5 volts.
Doc. Rev. 10.05, Nov 1997
MC1231A
MC1131A

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mc1451a-e Summary of contents

Page 1

Features Supports 3-phase as well as 2-phase brushless motors Performs trajectory generation, servo loop closure, and commutation Ultra-smooth sinusoidal commutation Open or closed loop operation Software and feature-compatible with other 1st generation PMD chipsets Available axis ...

Page 2

Table of Contents Product Family Overview....................................... Page 3 Introduction........................................................... Page 3 Family Summary................................................... Page 3 Electrical Characteristics....................................... Page 4 Absolute Maximum Ratings.................................. Page 4 Operating Ratings................................................. Page 4 DC Electrical Characteristics ................................ Page 5 AC Electrical Characteristics ................................ Page 5 ...

Page 3

... Two phased signals are output per axis in either PWM or DAC-compatible format. An incremental encoder signal can be input to confirm motor position. MC1451 series (MC1451A, MC1251A, MC1151A, MC1451A-E, MC1251A-E, MC1151A-E) - These chipsets provide very high speed pulse and direction signal output appropriate for driving step motor- based systems ...

Page 4

Electrical Characteristics Overview The MC1231A consists of two 68 pin PLCC's both fabricated in CMOS. The Peripheral Input/Output IC (I/O chip) is responsible for interfacing to the host processor and to the position input encoders. The Command Processor IC (CP ...

Page 5

DC Electrical Characteristics (Vcc and Ta per operating ratings, Fclk = 25.0 Mhz) Symbol Parameter Vcc Supply Voltage Idd Supply Current Input Voltages Vih Logic 1 input voltage Vil Logic 0 input voltage Vihclk Logic 1 voltage for clock pin ...

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Timing Interval Command Byte Write Timing ~HostSlct Hold Time ~HostSlct Setup Time HostCmd Setup Time Host Cmd Hold Time HostRdy Delay Time ~HostWrite Pulse Width Write Data Setup Time Write Data Hold Time Data Word Read Timing ~HostSlct Hold Time ...

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I/O Timing Diagrams The following diagrams show the MC1231A electrical interface timing. T#' values are listed in the above timing chart. Quad A Quad B ~Index ClkIn Quadrature Encoder Input Timing Clock Timing T4 ...

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HostCmd ~HostWrite HostData0-7 HostRdy Command Byte Write TIming T7 T8 T14 T15 T16 T13 ...

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T7 ~HostSlct T8 HostCmd ~HostRead High-Z HostData0-7 T10 HostRdy Data Word Read TIming Note 1 Note 1 T17 T12 High-Z High Byte T11 High-Z Low Byte T13 ...

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T7 ~HostSlct T8 HostCmd ~HostWrite HostData0-7 HostRdy Data Word Write TIming Note 1 Note 1 T18 T14 T15 High Byte T16 T14 T15 Low Byte T16 T13 ...

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ClkOut I/OAddr ~I/OWrite Data 0-11, DACAddr0,1 DACSlct DAC Interface Timing T25 T22 T19 T23 T24 T27 T26 11 T20 T21 ...

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Pinouts I/O (Top view 21, 25, 38, 55 VCC QuadA1 28 QuadB1 42 24 Index1 Home1 13 QuadA2 26 30 QuadB2 Index2 9 Home2 23 Hall1A 40 Hall1B 35 Hall1C I/O 19 Hall2A 39 ...

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Pin Descriptions The following tables provide pin descriptions for the MC1231-series chipsets. IC Pin Name Pin # I/O Chip Pinouts I/O QuadA1 28 QuadB1 42 QuadA2 26 QuadB2 30 I/O ~Index1 24 ~Index2 9 I/O ~Home1 13 ~Home2 23 I/O ...

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IC Pin Name Pin # I/O HostRdy 37 I/O ~HostRead 51 I/O ~HostWrite 47 I/O ~HostSlct 48 I/O ~HostIntrpt 44 I/O HostData0 50 HostData1 61 HostData2 53 HostData3 65 HostData4 67 HostData5 62 HostData6 64 HostData7 60 I/O CPData4 18 ...

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IC Pin Name Pin # CP Chip Pinouts CP PWMMag1 8 PWMMag2 7 PWMMag3 2 PWMMag4 1 PWMMag5 66 PWMMag6 65 CP PosLimit1 52 PosLimit2 45 CP NegLimit1 51 NegLimit2 44 CP DAC16Addr0 30 DAC16Addr1 29 CP ClkIn 24 Description/Functionality ...

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IC Pin Name Pin # CP ClkOut 19 CP ~Reset 17 CP I/OCntrl0 16 I/OCntrl1 18 I/OCntrl2 68 I/OCntrl3 67 CP Data0 60 Data1 59 Data2 58 Data3 57 Data4 50 Data5 49 Data6 46 Data7 43 Data8 40 Data9 ...

Page 17

Theory of Operations Incremental Encoder Index B Home 1/a 1/a 1/a I/O Chip Quadrature decoder counter (2) Index capture register (2) Host I/O controller 5 8 Control Data host interrupt The above figure shows an internal block diagram for the ...

Page 18

MC1231A-Series Chipset Operational Parameters Available configurations: 2 axes with internal sinusoidal commutation (MC1231A) 1 axes with internal sinusoidal commutation (MC1131A) Operating Modes: Closed loop (motor command is driven from output of servo filter) Open loop (motor command is driven from ...

Page 19

The profile mode may be programmed independently for each axis. For example axis #1 may be in trapezoidal point to point mode while axis # S-curve point to point. Generally, the axis should be at rest when switching ...

Page 20

See the section of this manual entitled "Command Error" for more information.. Before switching to the S-curve point to point profile mode, the axis should ...

Page 21

Example Velocity Contouring Mode Vel. change acceleration change max velocity There are no restrictions on switching the profile mode to velocity contouring while the axis is in motion. Electronic Gear The following table summarizes the host specified profile parameters for ...

Page 22

For example if the profile mode is S-curve, and a SMOOTH_STOP command is given, the profile will decelerate in a manner exactly equal and opposite to the acceleration phase. The STOP command functions in all profile modes; S-curve point- ...

Page 23

the position error at sample time the target position at sample time the actual position at sample time n Int the integration sum at time ...

Page 24

Register Name Command to set destination position SET_POS maximum velocity SET_VEL acceleration SET_ACC maximum acceleration SET_MAX_ACC jerk SET_JERK ratio SET_RATIO Kp SET_KP Ki SET_KI Kd SET_KD Kvff SET_KVFF Integration limit SET_I_LM The double-buffered commands are: STOP, SMOOTH_STOP, and SYNCH_PRFL. Manual ...

Page 25

After a breakpoint condition has been satisfied longer active. To set up another breakpoint condition, a new one must be explicitly set by the host. The double-buffered registers that are shifted to the active registers do not ...

Page 26

Motion Error Detection and Recovery Under certain circumstances, the actual axis position may differ from the target (desired) axis position by an excessive amount. Such an ...

Page 27

Host Communications Electrical Interface The MC1231A communicates to the host processor via an 8-bit bi- directional data port. 5* additional signals are used to synchronize communication operations. The following table gives a brief description of the control signals used during ...

Page 28

Packet Checksum The above charts show that at the end of each packet, a checksum word is available for reading. Although host to chip set I/O operations are extremely reliable, for critical applications the checksum can provide a further reliability ...

Page 29

Axis Status The MC1231A supports a status word for each axis, which contains various information about the state of the axis. The status word is a 16-bit register which can be queried using the command GET_STATUS. It contains the following ...

Page 30

The mechanism used to control each condition is a mask register. The interrupt conditions correspond to bits 0-7 and 11 of the status register (the axis event flags), described in the previous ...

Page 31

The RST_INTRPT and GET_I commands are only effective when there is an interrupt present interrupt is present than alternative 'polled-mode' commands such as RST_STATUS or GET_STATUS should be used. Encoder Position Feedback The MC1231A-series of chipsets support direct ...

Page 32

Motor Output Control The following diagram shows the control flow for the motor command output by the chipset. Motor command register (SET_MTR_CMD) MTR_OFF Sinusoidal Commutator MTR_ON Trajectory Servo filter Generator (PID or PIVff) The chipset can be run in either ...

Page 33

Commutation Waveforms The MC1231A supports two commutation waveforms, a 120 degree offset waveform appropriate for 3-phase brushless motors, and a 90- degree offset waveform appropriate for 2-phase brushless motors. To specify the 3-phase brushless waveform the command SET_PHASE_3 is used, ...

Page 34

Commutation Error Detection With an index signal properly installed the chipset will automatically correct any small losses of encoder counts that may occur. If the loss of encoder counts becomes excessive however the index pulse does not arrive ...

Page 35

Brushless Phase A Phase B Hall A Hall B Hall C 90 180 270 Unlike the algorithmic method, using Hall-based phase initialization no special motor procedures are required. Initialization is performed using the command INIT_PHASE, and occurs immediately, without ...

Page 36

GET_PHASE_INFO can be used. The 'phase initialization not completed' bit will indicate when the procedure is finished. After the initialization procedure is completed the motor should be enabled (MTR_ON cmd) if the chipset run in closed loop ...

Page 37

To convert the phase offset value which is in encoder counts to degrees the ...

Page 38

Commutation Command Summary: The following table summarizes the commands that are used in conjunction with sinusoidal commutation: Command Function SET_PHASE_3 Sets the commutation waveform for 3- phase brushless motors. SET_PHASE_2 Sets the commutation waveform for 2- phase brushless motors. SET_PHASE_HALL ...

Page 39

The waveform is centered around a value of 0 volts. The magnitude of the generated waveform is proportional to either the output of the servo filter or the motor command register (depending on the commutation mode and motor on/off status). ...

Page 40

Command Summary Command Mnemonic Code Available (hex) on Axis Control SET_1 01 all axes SET_2 02 all axes SET_I 08 all axes Profile Generation SET_PRFL_S_CRV 0b all axes SET_PRFL_TRAP 09 all axes SET_PRFL_VEL 0a all axes SET_PRFL_GEAR 0c 1 SET_POS ...

Page 41

Command Mnemonic Code Available ( hex) on Interrupt Processing SET_INTRPT_MASK 2f all axes GET_INTRPT 30 all axes RST_INTRPT 32 all axes GET_INTRPT_MASK 56 all axes Status/Mode CLR_STATUS 33 all axes RST_STATUS 34 all axes GET_STATUS 31 all axes GET_MODE 48 ...

Page 42

Command Reference Each command consists of a single byte, with a command code value as described in the "encoding" description for each command. Data is transmitted to/from the chip set in 16-bit words. All data is encoded "high to low" ...

Page 43

Profile Generation SET_PRFL_S_CRV Set profile mode to S-curve point to point Data/direction: none Encoding: 0b (hex) Axis acted on: current axis Available on: all axes Double buffered: No SET_PRFL_S_CRV sets the trajectory profile mode to S-curve point to point. In ...

Page 44

The loaded position is not utilized until a parameter update occurs. SET_VEL Set command velocity Data/direction: 2/write Encoding: 11 (hex) Axis acted on: current axis Available on: all axes Double buffered: yes SET_VEL sets the maximum velocity ...

Page 45

SMOOTH_STOP Smoothly stop current axis motion Data/direction: none Encoding: 4e (hex) Axis acted on: current axis Available on: all axes Double buffered: yes SMOOTH_STOP stops the current axis by setting the desired velocity to zero, resulting in a controlled deceleration ...

Page 46

GET_JERK Get command jerk Data/direction: 2/read Encoding: 58 (hex) Axis acted on: current axis Available on: all axes Double buffered: - GET_JERK returns the jerk value set using the SET_JERK command. It returns the double-buffered value (set directly by the ...

Page 47

SET_I_LM Set integration limit Data/direction: 1/write Encoding: 28 (hex) Axis acted on: current axis Available on: all axes Double buffered: yes SET_I_LM sets the integration limit for the digital filter. The integration limit is specified as an unsigned 16-bit number. ...

Page 48

GET_KI Get integral gain Data/direction: 1/read Encoding: 51 (hex) Axis acted on: current axis Available on: all axes Double buffered: - GET_KI returns the integral gain set using the SET_KI command. It returns the double-buffered value (set directly by the ...

Page 49

SET_AUTO_STOP_ON Enable automatic motor shutdown Data/direction: none Encoding: 45 (hex) Axis acted on: current axis Available on: all axes Double buffered: no SET_AUTO_STOP_ON enables automatic motor shutdown upon motion error. In this mode the motor will be disabled (equivalent to ...

Page 50

SET_ACTL_NEG_BRK Set break point mode to negative actual position based Data/direction: none Encoding: 1c (hex) Axis acted on: current axis Available on: all axes Double buffered: no SET_ACTL_NEG_BRK sets the current breakpoint mode to negative actual position based. In this ...

Page 51

MULTI_UPDATE Immediately update parameters for multiple axis Data/direction: 1/write Encoding: 5b (hex) Axis acted on: set by data word Available on: all axes Double buffered: no MULTI_UPDATE immediately updates the profile and filter parameters for 1 or more axis simultaneously. ...

Page 52

GET_INTRPT Return status of the interrupting axis Data/direction: 1/read Encoding: 30 (hex) Axis acted on: interrupting axis Available on: all axes Double buffered: - GET_INTRPT returns the status of the axis that generated a host interrupt. The current axis number ...

Page 53

GET_STATUS Get axis status word Data/direction: 1/read Encoding: 31 (hex) Axis acted on: current axis Available on: all axes ...

Page 54

Motor SET_OUTPUT_PWM Set motor output mode to PWM Data/direction: none Encoding: 3c (hex) Axis acted on: global (all axes) Available on: all axes Double buffered: no SET_OUTPUT_PWM sets the motor output mode to PWM. PWM mode outputs the motor output ...

Page 55

The encoding is as follows: Returned Word Value Output Mode 0 PWM 1 not used 2 DAC16 GET_BUF_MTR_CMD Get double-buffered motor output value Data/direction: 1/read Encoding: 69 (hex) Axis acted on: ...

Page 56

GET_LMT_SWTCH Get state of over-travel limit switches Data/direction: 1/read Encoding: 67 (hex) Axis acted on: global (all axes) Available on: all axes Double buffered: - GET_LMT_SWTCH returns the value of the limit switch input signals for all valid axis. The ...

Page 57

RESET Reset chip set Data/direction: none Encoding: 39 (hex) Axis acted on: global (all axes) Available on: all axes Double buffered: No RESET resets the entire chip set. This command performs the same sequence as a hardware reset. At the ...

Page 58

SET_PHASE_2 Set waveform mode to 2-phase Data/direction: none Encoding: 74 (hex) Axis acted on: global Available on: all Double buffered: no SET_PHASE_2 sets the current commutation waveform to 2-phase. In this scheme the commutated output signals have a phase separation ...

Page 59

The minimum allowed value for this parameter is 129 (decimal). SET_PHASE_TIME Set amount of time to wait after phase initialization Data/direction: 1/write Encoding: 72 (hex) Axis acted on: current axis Available on: all Double buffered: no SET_PHASE_TIME sets the amount ...

Page 60

SET_PHASE_TIME command. When used in the algorithmic initialization mode before this command is given a double-buffered motor command value must be specified ...

Page 61

GET_HALLS Get state of Hall sensors Data/direction: 1/read Encoding: 7e (hex) Axis acted on: global Available on: all Double buffered: - GET_HALLS returns the state of the hall sensors input into the chipset. The returned word is encoded as follows: ...

Page 62

Application Notes Interfacing MC1231A to ISA bus. A complete, ready-to-use ISA (PC/AT) bus interface circuit has been provided to illustrate MC1231A host interfacing, as well as to make it easier for the customer to build an MC1231A-based system. The interface ...

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Page 64

PWM Motor Interface The following schematic shows a typical interface circuit between the MC1231A and an amplifier used in PWM output mode. The SGSL6234 from SGS-Thompson is an integrated package which provides 3 half-bridge amplifiers on a single chip. It ...

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Page 66

Parallel DAC Interface The Interface between the MC1231A chip set and one or more 16 bit DACs is shown in the following figure. Comments on Schematic The 16 Data bits and 2 address bits from the CP chip are ...

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NOTES 68 ...

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Incremental Encoder Index Home B 1/a 1/a 1/a I/O Chip Quadrature decoder counter (2) Index capture register (2) Host I/O controller 5 8 Control Data host interrupt Available Configurations: Operating Modes: Position Range: Velocity Range: Acceleration Range: Jerk Range: Trajectory ...

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