mk3732-08 Integrated Device Technology, mk3732-08 Datasheet - Page 2

• Manufacturer Part Number: mk3732-08
• Description: Adsl Clock Source
• Manufacturer: Integrated Device Technology

MDS 3732-08 C
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose • CA • 95126 • [phone] tel • [phone] fax • www.icst.com
External Components
The MK3732-08 requires a minimum number of external components for proper operation. Decoupling capacitors of
0.01µF should be connected between VDD and GND pins 3 and 7, pins 4 and 8, and pins 5 and 9, as close to the
MK3732-08 as possible. A series termination resistor of 33
must be connected as close to the chip as possible. The input crystal should be a fundamental mode, parallel
resonant, pullable, AT cut.
Consult ICS for recommended suppliers. IMPORTANT - Consult the Application Note MAN05 for layout guidelines.
Pin Descriptions
Number Name Type Description
Key: I(PU) = Input with internal pull-up resistor; TI = Tri-level Input; O = Output; P = Power Supply Connection;
VI = Analog Voltage Input; XI, XO = Crystal Pins.
Pin Assignment
3, 4, 5
7, 8, 9
2, 19
10
11
12
13
14
15
16
17
18
20
1
6
VDD
VDD
VDD
GND
GND
GND
VIN
NC
PD
REFEN
X1
CLK1
CLK2
GND
VDD
REF
VIN
OE
X1
NC
PD
S2
S0
S1
X2
20 pin (150 mil) SSOP
1
2
3
4
6
7
8
10
5
9
I(PU) Power Down active low. Turns entire chip off, clocks stop low.
I(PU) Select input #2. Selects outputs per table above.
I(PU) Output Enable. Tri-states outputs when low.
I(PU) Reference Clock Enable. Enables REF Output when low. Connect to VDD for lowest jitter.
I(PU) Select input #1. Selects outputs per table above.
XO
XI
VI
O
O
TI
O
P
P
-
Crystal connection. Connect to a pullable crystal of 17.664 MHz or 24.576 MHz..
No Connect. Do not connect anything to this pin.
Power Supply. Connect to +3.3V.
Voltage Input to VCXO. Zero to 3.3V signal which controls the VCXO frequency.
Connect to ground.
Clock Output #1 per table above.
Clock Output #2 per table above.
Select input #0. Selects outputs per table above.
Reference Clock Output. This is the crystal oscillator output clock.
Crystal connection. Connect to a pullable crystal of 17.664 MHz or 24.576 MHz.
18
17
20
19
16
15
14
13
12
11
X2
NC
S1
REF
REFEN
S0
OE
S2
CLK2
CLK1
Clock Select Table
0=connect directly to GND; M=leave unconnected (floating);
1=connect directly to VDD
* In this mode, 12.288 MHz is present on REF
S2
0
0
0
0
0
0
1
1
1
1
1
1
2
may be used for each clock output. The input crystal
S1
0
0
0
1
1
1
0
0
0
1
1
1
S0
M
M
M
M
0
1
0
1
0
1
0
1
24.576 *
17.664
17.664
17.664
17.664
17.664
17.664
17.664
17.664
17.664
17.664
17.664
Input
ADSL Clock Source
35.328
35.328
35.328
2.208
20.00
20.19
70.66
70.66
58.88
2.208
20.19
CLK1
4.04
MK3732-08
35.328
35.328
35.328
35.328
52.992
35.328
35.328
Revision 091201
61.82
56.52
CLK2
OFF
OFF
OFF