74hct112 NXP Semiconductors, 74hct112 Datasheet - Page 9

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74hct112

Manufacturer Part Number
74hct112
Description
Dual Flip-flop With Reset; Negative-edge Trigger
Manufacturer
NXP Semiconductors
Datasheet

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Philips Semiconductors
AC WAVEFORMS
1998 Jun 10
Dual JK flip-flop with set and reset;
negative-edge trigger
(1) HC : V
The shaded areas indicate when the input is permitted to
change for predictable output performance.
Fig.6
(1) HC : V
Fig.7
HCT: V
HCT: V
Waveforms showing the clock (nCP) to output (nQ, nQ) propagation delays, the clock pulse width,
clock pulse frequency.
Waveforms showing the set (nS
and reset pulse width and the nR
the nJ, nK to nCP set-up times, the nCP to nJ, nK hold times, the output transition times and the maximum
M
M
M
handbook, full pagewidth
M
= 50%; V
= 50%; V
= 1.3 V; V
= 1.3 V; V
I
I
I
I
= GND to V
= GND to V
= GND to 3 V.
= GND to 3 V.
nQ OUTPUT
nQ OUTPUT
nR D INPUT
nCP INPUT
nS D INPUT
CC
CC
.
.
t PHL
V M
D
) and reset (nR
D
(1)
t W
V M
and nS
t PLH
V M
(1)
(1)
D
to nCP removal time.
9
D
) input to output (nQ, nQ) propagation delays, the set
t rem
t PLH
V M
t PHL
(1)
t W
t rem
V M
MBK218
(1)
74HC/HCT112
Product specification

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