nbsg16m ON Semiconductor, nbsg16m Datasheet - Page 3

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nbsg16m

Manufacturer Part Number
nbsg16m
Description
2.5v/3.3v Multilevel Input To Cml Clock/data Receiver/driver/translator Buffer
Manufacturer
ON Semiconductor
Datasheet

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VTD
VTD
D
D
50 W
50 W
Figure 2. Logic Diagram
Table 2. Interfacing Options
Table 3. ATTRIBUTES
4. For additional Moisture Sensitivity information, refer to Application Note AND8003/D.
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 4)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
50 W
INTERFACING OPTIONS
V
V
CC
EE
RSECL, PECL, NECL
LVTTL, LVCMOS
AC−COUPLED
50 W
LVDS
CML
Characteristics
http://onsemi.com
Oxygen Index: 28 to 34
Q
Q
V
Charged Device Model
BB
Human Body Model
Machine Model
3
Nominal voltage 1.5 V for LVTTL and V
An external voltage should be applied to the
Bias VTD and VTD Inputs within (V
QFN−16
unused complementary differential input.
Standard ECL Termination Techniques
Connect VTD and VTD together
Connect VTD and VTD to V
50 W
Figure 3. CML Output Structure
Common Mode Range
CONNECTIONS
LVCMOS inputs.
Pb Pkg
Level 1
Value
UL 94 V−0 @ 0.125 in
> 100 V
> 1 kV
> 4 kV
V
V
145
CC
EE
Pb−Free Pkg
16 mA
Level 1
CC
IHCMR
CC
/2 for
50 W
)
Q
Q

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