max9856 Maxim Integrated Products, Inc., max9856 Datasheet - Page 42

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max9856

Manufacturer Part Number
max9856
Description
Max9856 Low-power Audio Codec With Directdrive Headphone Amplifiers
Manufacturer
Maxim Integrated Products, Inc.
Datasheet

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Low-Power Audio CODEC with
DirectDrive Headphone Amplifiers
Send the slave address with the R/W bit set to 1 to initi-
ate a read operation. The MAX9856 acknowledges
receipt of its slave address by pulling SDA low during
the 9th SCL clock pulse. A START command followed
by a read command resets the address pointer to reg-
ister 0x00. The first byte transmitted from the MAX9856
is the contents of register 0x00. Transmitted data is
valid on the rising edge of SCL. The address pointer
autoincrements after each read data byte. This auto-
increment feature allows all registers to be read
sequentially within one continuous frame. A STOP con-
dition can be issued after any number of read data
bytes. If a STOP condition is issued, followed by anoth-
er read operation, the first data byte to be read is from
register 0x00.
Figure 13. Reading 1 Indexed Byte of Data from the MAX9856
Figure 14. Reading n Bytes of Indexed Data from the MAX9856
42
S
ACKNOWLEDGE FROM MAX9856
S
______________________________________________________________________________________
SLAVE ADDRESS
ACKNOWLEDGE FROM MAX9856
SLAVE ADDRESS
R/W
R/W
0
0
A
A
ACKNOWLEDGE FROM MAX9856
ACKNOWLEDGE FROM MAX9856
Read Data Format
REGISTER ADDRESS
REGISTER ADDRESS
REPEATED START
REPEATED START
A
A
Sr
ACKNOWLEDGE FROM MAX9856
Sr
ACKNOWLEDGE FROM MAX9856
SLAVE ADDRESS
The address pointer can be preset to a specific register
before a read command is issued. The master presets
the address pointer by first sending the MAX9856’s
slave address with the R/W bit set to 0 followed by the
register address. A REPEATED START condition is then
sent followed by the slave address with the R/W bit set
to 1. The MAX9856 then transmits the contents of the
specified register. The address pointer autoincrements
after transmitting the first byte. The master acknowl-
edges receipt of each read byte during the acknowl-
edge clock pulse. The master must acknowledge all
correctly received bytes except the last byte. The final
byte must be followed by a not acknowledge from the
master and then a STOP condition. Figure 13 illustrates
the frame format for reading 1 byte from the MAX9856.
Figure 14 illustrates the frame format for reading multi-
ple bytes from the MAX9856.
SLAVE ADDRESS
R/W
R/W
1
1
A
NOT ACKNOWLEDGE FROM MASTER
A
DATA BYTE
1 BYTE
REGISTER ADDRESS POINTER
AUTOINCREMENT INTERNAL
DATA BYTE
1 BYTE
REGISTER ADDRESS POINTER
AUTOINCREMENT INTERNAL
A
P
A

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