max9325eqit Maxim Integrated Products, Inc., max9325eqit Datasheet - Page 7

• Manufacturer Part Number: max9325eqit
• Description: Max9325 2 8 Differential Lvpecl/lvecl/hstl Clock And Data Driver
• Manufacturer: Maxim Integrated Products, Inc.

1, 8, 15, 22
2:8 Differential LVPECL/LVECL/HSTL Clock and
Exposed
PLCC
10
11
12
13
14
16
17
18
19
20
21
23
24
25
26
27
28
2
3
4
5
6
7
9
PIN
4, 11, 18, 25
Exposed
QFN
_______________________________________________________________________________________
Pad
10
12
13
14
15
16
17
19
20
21
22
23
24
26
27
28
5
6
7
8
9
1
2
3
CLK_SEL
NAME
CLK0
CLK1
CLK1
CLK0
N.C.
V
V
V
Q7
Q7
Q6
Q6
Q5
Q5
Q4
Q4
Q3
Q3
Q2
Q2
Q1
Q1
Q0
Q0
—
CC
BB
EE
Positive Supply Voltage. Bypass each V
capacitors. Place the capacitors as close to the device as possible, with the smaller
value capacitor closest to the device.
Inverting Differential Clock Input 0. Internal 105kΩ pulldown to V
Reference Output Voltage. Connect to the inverting or noninverting clock input to
provide a reference for single-ended operation. When used, bypass V
0.01µF ceramic capacitor. Otherwise leave open.
Noninverting Differential Clock Input 1. Internal 105kΩ pulldown to V
Inverting Differential Clock Input 1. Internal 105kΩ pulldown to V
Not Connected
Inverting Q7 Output. Typically terminate with 50Ω resistor to V
Noninverting Q7 Output. Typically terminate with 50Ω resistor to V
Inverting Q6 Output. Typically terminate with 50Ω resistor to V
Noninverting Q6 Output. Typically terminate with 50Ω resistor to V
Inverting Q5 Output. Typically terminate with 50Ω resistor to V
Noninverting Q5 Output. Typically terminate with 50Ω resistor to V
Inverting Q4 Output. Typically terminate with 50Ω resistor to V
Noninverting Q4 Output. Typically terminate with 50Ω resistor to V
Inverting Q3 Output. Typically terminate with 50Ω resistor to V
Noninverting Q3 Output. Typically terminate with 50Ω resistor to V
Inverting Q2 Output. Typically terminate with 50Ω resistor to V
Noninverting Q2 Output. Typically terminate with 50Ω resistor to V
Inverting Q1 Output. Typically terminate with 50Ω resistor to V
Noninverting Q1 Output. Typically terminate with 50Ω resistor to V
Inverting Q0 Output. Typically terminate with 50Ω resistor to V
Noninverting Q0 Output. Typically terminate with 50Ω resistor to V
Negative Supply Voltage
Clock Select Input. When driven low, the CLK0 input is selected. Drive high to select
the CLK1 Input. The CLK_SEL threshold is equal to V
Noninverting Differential Clock Input 0. Internal 105kΩ pulldown to V
Internally Connected to V
EE
FUNCTION
CC
to V
EE
with 0.1µF and 0.01µF ceramic
BB
. Internal 75kΩ pulldown to V
Data Driver
Pin Description
CC
CC
CC
CC
CC
CC
CC
CC
EE
EE
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
CC
CC
CC
CC
CC
CC
CC
CC
.
.
EE
EE
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
- 2V.
BB
.
.
to V
CC
with a
EE
7
.