max9311ehj-t Maxim Integrated Products, Inc., max9311ehj-t Datasheet
max9311ehj-t
Related parts for max9311ehj-t
max9311ehj-t Summary of contents
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... Output Low with Open Input o Pin Compatible with MC100LVEP111 (MAX9311) and MC100EP111 (MAX9313) o Offered in Tiny QFN* Package (70% Smaller reference output BB Footprint than LQFP) reference output of PART ✕ MAX9311ECJ MAX9311EGJ* MAX9311EHJ* Applications MAX9313ECJ MAX9313EGJ* MAX9313EHJ* *Future product—contact factory for availability ...
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Differential LVPECL/LVECL/HSTL Clock and Data Drivers ABSOLUTE MAXIMUM RATINGS ...............................................................................4. CLK_, CLKSEL)..............V Inputs (CLK_, EE CLK_ to CLK_ ....................................................................±3.0V Continuous Output Current .................................................50mA Surge Output Current........................................................100mA V Sink/Source Current ...............................................±0.65mA BB Junction-to-Ambient Thermal Resistance ...
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Differential LVPECL/LVECL/HSTL DC ELECTRICAL CHARACTERISTICS (continued +2.25V to +3.8V, outputs loaded with 50Ω ± PARAMETER SYMBOL CONDITIONS V BB connected Single-Ended to CLK_ Input Low for V IL ...
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Differential LVPECL/LVECL/HSTL Clock and Data Drivers AC ELECTRICAL CHARACTERISTICS ( 2.25V to 3.8V, outputs loaded with 50Ω ± (20% to 80%), CLKSEL = high or low, V IHD ...
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Differential LVPECL/LVECL/HSTL (V = +3.3V 0.95V IHD CC loaded with 50Ω 2V +25°C, unless otherwise noted SUPPLY CURRENT ( vs. ...
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Differential LVPECL/LVECL/HSTL Clock and Data Drivers PIN NAME 1, 9, 16, Positive Supply Voltage. Bypass from 25, 32 capacitors as close to the device as possible with the smaller value capacitor closest to the device. Clock ...
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Differential LVPECL/LVECL/HSTL Detailed Description The MAX9311/MAX9313 are low skew, 1-to-10 differen- tial drivers designed for clock and data distribution. A 2:1 mux selects between the two differential inputs, CLK0, CLK0 and CLK1, CLK1. The 2:1 mux is switched by ...
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Differential LVPECL/LVECL/HSTL Clock and Data Drivers differential pair by matching the electrical length of the traces. Output Termination Terminate outputs through 50Ω equivalent Thevenin termination. When a single-ended signal is taken from a differential output, terminate both ...
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Differential LVPECL/LVECL/HSTL V CC 75kΩ CLK0 CLK0 75kΩ 75kΩ 75kΩ CLK1 CLK1 75kΩ 75kΩ CLKSEL V BB _______________________________________________________________________________________ Clock and Data Drivers Functional Diagram ...
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Differential LVPECL/LVECL/HSTL Clock and Data Drivers (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) 10 ______________________________________________________________________________________ Package Information ...
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Differential LVPECL/LVECL/HSTL (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) ______________________________________________________________________________________ Clock and Data Drivers Package Information (continued) 11 ...
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Differential LVPECL/LVECL/HSTL Clock and Data Drivers (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.) Maxim cannot assume responsibility for use of any circuitry other ...