max9155extt Maxim Integrated Products, Inc., max9155extt Datasheet
max9155extt
Related parts for max9155extt
max9155extt Summary of contents
Page 1
Rev 0; 10/01 General Description The MAX9155 is a low-voltage differential signaling (LVDS) repeater, which accepts a single LVDS input and duplicates the signal at a single LVDS output. Its low-jitter, low-noise performance makes it ideal for buffering LVDS ...
Page 2
Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package ABSOLUTE MAXIMUM RATINGS V to GND ...........................................................-0.3V to +4.0V CC IN+, IN- to GND.....................................................-0.3V to +4.0V OUT+, OUT- to GND .............................................-0.3V to +4.0V Short-Circuit Duration (OUT+, OUT-) .........................Continuous Continuous Power Dissipation (T ...
Page 3
AC ELECTRICAL CHARACTERISTICS (V = +3.0V to +3.6V 100Ω ±1 unless otherwise noted. Typical values are at V PARAMETER Differential Propagation Delay High to Low Differential Propagation Delay Low to High Added Deterministic Jitter (Notes ...
Page 4
Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package (V = +3.3V 100Ω ±1 10pF frequency = 100MHz, 50% duty cycle SUPPLY CURRENT INPUT FREQUENCY VS ...
Page 5
R = 100Ω ±1 10pF frequency = 100MHz, 50% duty cycle, R TRANSITION TIME TEMPERATURE VS. 800 750 700 650 t 600 TLH 550 500 450 400 -40 -15 TEMPERATURE (°C) Pin ...
Page 6
Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package Applications Information Supply Bypassing Bypass V with a high-frequency surface-mount CC ceramic 0.01µF capacitor as close to the device as possible. Differential Traces Input and output trace characteristics affect the perfor- mance ...
Page 7
IN2 V - 0. IN1 R /2 IN1 IN- Figure 1. LVDS Fail-Safe Input 1.25V IN+ 1.20V V OD 1.25V IN- 1.20V Figure 2. DC Load Test Circuit _______________________________________________________________________________________ Low-Jitter, Low-Noise LVDS Repeater ...
Page 8
Low-Jitter, Low-Noise LVDS Repeater in an SC70 Package IN- O (DIFFERENTIAL) IN+ t PLHD OUT- OUT+ 20% V DIFF Figure 4. Transition Time and Propagation Delay Timing Diagram 1/4 MAX9129 REPEATERS REDUCE ASIC OR FPGA STUB LENGTH ON A MULTIDROP ...
Page 9
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim ...