max9123euetg Maxim Integrated Products, Inc., max9123euetg Datasheet

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max9123euetg

Manufacturer Part Number
max9123euetg
Description
Max9123 Quad Lvds Line Driver With Flow-through Pinout
Manufacturer
Maxim Integrated Products, Inc.
Datasheet
The MAX9123 quad low-voltage differential signaling
(LVDS) differential line driver is ideal for applications
requiring high data rates, low power, and low noise. The
MAX9123 is guaranteed to transmit data at speeds up to
800Mbps (400MHz) over controlled impedance media of
approximately 100Ω. The transmission media may be
printed circuit (PC) board traces, backplanes, or cables.
The MAX9123 accepts four LVTTL/LVCMOS input levels
and translates them to LVDS output signals. Moreover,
the MAX9123 is capable of setting all four outputs to a
high-impedance state through two enable inputs, EN and
EN, thus dropping the device to an ultra-low-power state
of 16mW (typ) during high impedance. The enables are
common to all four transmitters. Outputs conform to the
ANSI TIA/EIA-644 LVDS standard. Flow-through pinout
simplifies PC board layout and reduces crosstalk by sep-
arating the LVTTL/LVCMOS inputs and LVDS outputs.
The MAX9123 operates from a single +3.3V supply and is
specified for operation from -40°C to +85°C. It is available
in 16-pin TSSOP and SO packages. Refer to the MAX9121/
MAX9122* data sheet for quad LVDS line receivers with
integrated termination and flow-through pinout.
19-1927; Rev 0; 2/01
* Future product—contact factory for availability.
For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Digital Copiers
Laser Printers
Cell Phone Base
Stations
Add Drop Muxes
Digital Cross-Connects
TOP VIEW
GND
V
IN1
IN2
IN3
IN4
EN
EN
CC
________________________________________________________________ Maxim Integrated Products
1
2
3
4
5
6
7
8
General Description
TSSOP/SO
MAX9123
Pin Configuration
DSLAMs
Network
Switches/Routers
Backplane
Interconnect
Clock Distribution
16
15
14
13
12
11
10
9
Applications
OUT1-
OUT1+
OUT2+
OUT2-
OUT3-
OUT3+
OUT4+
OUT4-
Quad LVDS Line Driver with
o Flow-Through Pinout
o Pin Compatible with DS90LV047A
o Guaranteed 800Mbps Data Rate
o 250ps Maximum Pulse Skew
o Conforms to TIA/EIA-644 LVDS Standard
o Single +3.3V Supply
o 16-Pin TSSOP and SO Packages
LVTTL/CMOS
DATA INPUT
MAX9123EUE
MAX9123ESE
Simplifies PC Board Layout
Reduces Crosstalk
Flow-Through Pinout
PART
100Ω SHIELDED TWISTED CABLE OR MICROSTRIP PC BOARD TRACES
Typical Applications Circuit
MAX9123
T
T
T
T
X
X
X
X
LVDS SIGNALS
TEMP. RANGE
-40°C to +85°C
-40°C to +85°C
Ordering Information
107Ω
107Ω
107Ω
107Ω
MAX9122*
R
R
R
R
PIN-PACKAGE
16 TSSOP
16 SO
X
X
X
X
Features
LVTTL/CMOS
DATA OUTPUT
1

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max9123euetg Summary of contents

Page 1

Rev 0; 2/01 General Description The MAX9123 quad low-voltage differential signaling (LVDS) differential line driver is ideal for applications requiring high data rates, low power, and low noise. The MAX9123 is guaranteed to transmit data at speeds up to ...

Page 2

Quad LVDS Line Driver with Flow-Through Pinout ABSOLUTE MAXIMUM RATINGS V to GND ...........................................................-0.3V to +4.0V CC IN_, EN GND....................................-0. OUT_+, OUT_- to GND..........................................-0.3V to +3.9V Short-Circuit Duration (OUT_+, OUT_-) .....................Continuous Continuous Power Dissipation (T = ...

Page 3

SWITCHING CHARACTERISTICS (V = +3.0V to +3.6V 100Ω ±1 otherwise noted.) (Notes PARAMETER SYMBOL Differential Propagation Delay t High to Low Differential Propagation Delay t Low to High Differential Pulse Skew (Note ...

Page 4

Quad LVDS Line Driver with Flow-Through Pinout (V = +3.3V 100Ω 15pF OUTPUT HIGH VOLTAGE vs. POWER-SUPPLY VOLTAGE 1.100 1.098 1.096 1.094 1.092 1.090 3.0 3.3 3.6 POWER-SUPPLY VOLTAGE (V) OUTPUT ...

Page 5

R = 100Ω 15pF POWER-SUPPLY CURRENT vs. AMBIENT TEMPERATURE 25.0 FREQ = 1MHz 24.0 23.0 22.0 21.0 20.0 -40 - AMBIENT TEMPERATURE ...

Page 6

Quad LVDS Line Driver with Flow-Through Pinout PIN NAME Driver Enable Input. The driver is disabled when EN is low internally pulled down. When EN = high and EN = low or open, the outputs are active. For ...

Page 7

OUT_ IN_ CC GND OUT_- Figure 1. Driver V and V Test Circuit OD OS IN_ OUT_ - OUT_+ V DIFF Figure 3. Driver Propagation Delay and Transition Time Waveforms Eliminate reflections and ...

Page 8

Quad LVDS Line Driver with Flow-Through Pinout V CC IN_ GND EN GENERATOR EN 50Ω 1/4 MAX9123 Figure 4. Driver High-Impedance Delay Test Circuit EN WHEN OPEN EN WHEN OUT_+ WHEN IN_ ...

Page 9

Quad LVDS Line Driver with _______________________________________________________________________________________ Flow-Through Pinout Package Information 9 ...

Page 10

Quad LVDS Line Driver with Flow-Through Pinout Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are Maxim cannot assume responsibility for use of any circuitry other ...

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