max97236 Maxim Integrated Products, Inc., max97236 Datasheet - Page 2

• Manufacturer Part Number: max97236
• Description: Audio Amplifier With Jack Detection
• Manufacturer: Maxim Integrated Products, Inc.

Audio Amplifier with Jack Detection
ABSOLUTE MAXIMUM RATINGS
V
MICVDD to PGND ................................................-0.3V to +5.5V
PVDD to PGND ......................................... -0.3V to (V
PVSS to PGND ........................................................-2V to +0.3V
GND to PGND ......................................................-0.1V to +0.1V
TIP, RING1, IN_ to PGND ..................................... (V
RING2, SLEEVE to PGND ...................................... (GND - 0.3V)
JACKSW to PGND .............. (V
MBIAS to PGND ....................................... -0.3V to (V
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
otherwise noted. See the
2
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
Junction-to-Ambient Thermal Resistance (q
ELECTRICAL CHARACTERISTICS
(V
Supply Voltage Range
Undervoltage Lockout
Shutdown Supply Current
Sleep Supply Current
Quiescent Supply Current
SDA, SCL Input Logic-High
SDA, SCL Input Logic-Low
SDA, SCL, EXTCLK Input
Leakage Current High
SDA, SCL, EXTCLK Input
Leakage Current Low
SDA, SCL Output Logic-Low
IRQ Output High Current
IRQ Output Logic-Low
DD
GENERAL
DD
to PGND ..........................................................-0.3V to +2V
= 1.8V, V
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
PARAMETER
MICVDD
= 3.0V, V
Functional Diagram/Typical Application
PVSS
GND
- 0.3V) to (V
= V
SYMBOL
I
I
VDD_SDF
VDD_SDS
I
V
VDD_SL
UVLO
I
OLI2C
V
V
PGND
VDD
V
I
V
I
to (V
I
OH
DD
IH
OL
JA
IL
IH
IL
to (V
)...............52°C/W
MICVDD
MICVDD
= 0V, C
PVDD
PVSS
DD
DD
Guaranteed by PSRR test
Rising V
In jack detect mode, T
detect mode, external clock disabled
In jack detect mode, T
detect mode, external clock disabled
T
T
1.8V logic compliant
1.8V logic compliant
T
T
I
V
I
OLI2C
OL
A
A
A
A
IRQ_OUT
+ 0.3V)
+ 0.3V)
+ 0.3V)
+ 0.3V)
+ 0.3V)
= +25NC, external clock disabled
= +25NC, state = LRGM
= +25NC
= +25NC
- 0.3V)
FLY
= 3mA
= 2.3mA
= C
DD
= 3.3V, T
, T
PVDD
Circuit.) (Note 2)
CONDITIONS
A
= +25NC
MOUT+ and MOUT- to PGND ..........-0.3V to (V
C1P to PGND ........................................-0.3V to (V
C1N to PGND ........................................ (V
SDA, SCL, EXTCLK, and IRQ to PGND ..................-0.3V to +6V
Output Short-Circuit Duration ....................................Continuous
Junction Temperature .....................................................+150NC
Operating Temperature Range .......................... -40NC to +85NC
Storage Temperature Range ............................ -65NC to +150NC
Soldering Temperature (reflow) ......................................+230NC
= C
Continuous Power Dissipation (Mulitlayer Board, T
25-Bump WLP (derate 19.2mW/NC above +70NC) ....1536mW
A
PVSS
= +25NC
A
A
= +25NC, fast
= +25NC, slow
= 1FF. Typical values tested at T
1.62
MIN
1.4
-1
-1
0.2 x
TYP
V
1.8
2.3
14
14
DD
PVSS
A
MAX
0.2 x
1.98
V
= +25NC, unless
1.6
3.9
0.4
+1
+1
MICVDD
- 0.3V) to +0.3V
25
25
25
DD
1
PVDD
A
= +70NC)
UNITS
+ 0.3V)
+ 0.3V)
mA
FA
FA
FA
FA
FA
V
V
V
V
V
V