nb3n502 ON Semiconductor, nb3n502 Datasheet

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nb3n502

Manufacturer Part Number
nb3n502
Description
14 Mhz To 190 Mhz Pll Clock Multiplier
Manufacturer
ON Semiconductor
Datasheet

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nb3n502DG
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nb3n502DG
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Description
TTL/CMOS level output clock which is a precise multiple of the
external input reference clock signal source. The device is a cost
efficient replacement for the crystal oscillators commonly used in
electronic systems. It accepts a standard fundamental mode crystal or
an external reference clock signal. Phase−Locked−Loop (PLL) design
techniques are used to produce an output clock up to 190 MHz with a
50% duty cycle. The NB3N502 can be programmed via two select
inputs (S0, S1) to provide an output clock (CLKOUT) at one of six
different multiples of the input frequency source, and at the same time
output the input aligned reference clock signal (REF).
Features
NB3N502
14 MHz to 190 MHz PLL
Clock Multiplier
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 0
X1/CLK
The NB3N502 is a clock multiplier device that generates a low jitter,
Clock Output Frequency up to 190 MHz
Operating Range: V
Low Jitter Output of 15 ps One Sigma (rms)
Zero ppm Clock Multiplication Error
45% − 55% Duty Cycle
25 mA TTL−level Drive Outputs
Crystal Reference Input Range of 5 − 27 MHz
Input Clock Frequency Range of 2 − 50 MHz
Available in 8−pin SOIC Package or in Die Form
Full Industrial Temperature Range −40°C to 85°C
This is a Pb−Free Device
X2
Oscillator
Multiplier
Crystal
S1
Select
S0
DD
= 3 V to 5.5 V
GND
V
DD
÷
P
Figure 1. NB3N502 Logic Diagram
Detector
Phase
1
Reference
÷
M
Clock
Charge
Pump
†For information on tape and reel specifications,
NB3N502DG
NB3N502DR2G
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Feedback
Device
8
CASE 751
VCO
D SUFFIX
SOIC−8
ORDERING INFORMATION
3N502 = Specific Device Code
A
L
Y
W
G
1
http://onsemi.com
(Pb−Free)
(Pb−Free)
Package
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
SOIC−8
SOIC−8
TTL/
CMOS
Output
TTL/
CMOS
Output
MARKING DIAGRAM
Publication Order Number:
8
1
2500/Tape & Reel
3N502
98 Units/Rail
ALYW
Shipping
G
NB3N502/D
REF
CLKOUT

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nb3n502 Summary of contents

Page 1

... MHz to 190 MHz PLL Clock Multiplier Description The NB3N502 is a clock multiplier device that generates a low jitter, TTL/CMOS level output clock which is a precise multiple of the external input reference clock signal source. The device is a cost efficient replacement for the crystal oscillators commonly used in electronic systems. It accepts a standard fundamental mode crystal or an external reference clock signal. Phase− ...

Page 2

... Three−level Input 8 X2 Crystal Input Table 4. ATTRIBUTES ESD Protection Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or Exceeds JEDEC Standard EIA/JESD78 IC Latchup Test 1. For additional Moisture Sensitivity information, refer to Application Note AND8003/D. NB3N502 GND 6 REF ...

Page 3

... Total Period Jitter, (peak−to−peak) jitter (pk−to−pk Output rise/fall time ( Parameters are guaranteed by characterization and design, not tested in production. NB3N502 Condition 1 GND = LFPM 500 LFPM (Note 5.5 V unless otherwise noted, GND = Characteristic I = − ...

Page 4

... High Frequency CMOS/TTL Oscillators The NB3N502, along with a low frequency fundamental mode crystal, can build a high frequency CMOS/TTL output oscillator. For example MHz crystal connected to the NB3N502 with the 5X output selected ( produces a 100 MHz CMOS/TTL output clock. External Components Decoupling Instructions In order to isolate the NB3N502 from system power supply, noise de− ...

Page 5

... D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 J K 0.40 1.27 0.016 0.050 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244 mm inches ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NB3N502/D _ ...

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