nb3n3010b ON Semiconductor, nb3n3010b Datasheet
nb3n3010b
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nb3n3010b Summary of contents
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... S0 pin. The two LVCMOS output drivers are disabled to a logic Low with the ENABLEn pin set HIGH. The NB3N3010B operates from a single +3.3 V supply, and is available in the SOIC−8 pin package, and optionally in a DFN8 package. The operating temperature range is from 0° ...
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... Output 7 CLKB LVCMOS Output 8 VDD Power Supply NB3N3010B REF 3 6 GND 4 5 Figure 2. Pinout SOIC−8 / DFN8 (Top View) Low active Output Enable; Defaults HIGH when left open; Internal pull−up resistor Frequency Select Input. See input frequency select Table 2 for details. Defaults HIGH when left open. Internal pull− ...
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Table 2. ATTRIBUTES ESD Protection R − ENABLEn Input Pull−up Resistor PU R − SO Input Pull−up Resistor PU Moisture Sensitivity (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, ...
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Table 5. AC CHARACTERISTICS V Symbol f Output Clock Frequency: CLKA & CLKB out kHz x 1536 OUT kHz x 3072 OUT f Reference Input Frequency REF t Reference Input Period Jitter (pk−pk) jit(per)−ref ...
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... Figure 1 shows the simplified block diagram of the NB3N3010B device. The primary function of the NB3N3010B is to accept a selectable 4 kHz or 8 kHz input reference clock, REF, and then multiply it to 12.288 MHz output frequency. Frequency Select − SO Either of two expected input REF frequencies, 4 kHz or 8 kHz, will be multiplied by the FLL to achieve 12.288 MHz at the low− ...
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CFILT for 1.8 V Regulator CFILT 1.8 V Regulator 220 − 270 nF Figure 4. CFILT Capacitor t REFH REF t MCLKL CLK A, CLK B A low noise 1.8 V LDO/Regulator is integrated to provide a clean supply for ...
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... ORDERING INFORMATION Device NB3N3010BDG NB3N3010BDR2G NB3N3010BMNG* NB3N3010BMNR4G* †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *To order other package and voltage variants, please contact your ON Semiconductor sales representative. Package SOIC− ...
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... C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004) ...
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... PAD AS WELL AS THE TERMINALS. MILLIMETERS DIM MIN MAX A 0.80 1.00 A1 0.00 0.05 A3 0.20 REF b 0.20 0.30 D 2.00 BSC D2 1.10 1.30 E 2.00 BSC E2 0.70 0.90 e 0.50 BSC K 0.30 REF L 0.25 0.35 L1 −−− 0.10 RECOMMENDED 8X 1.30 0.50 2.30 1 0.50 PITCH DIMENSIONS: MILLIMETERS ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NB3N3010B/D ...