pi90lv3810 Pericom Semiconductor Corporation, pi90lv3810 Datasheet

pi90lv3810

Manufacturer Part Number

pi90lv3810

Description

Line Receiver 10rx 48-pin Tssop T/r

Manufacturer

Pericom Semiconductor Corporation

Datasheet

1.PI90LV3810.pdf (11 pages)

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Features

• Ten line receivers meet or exceed the requirements of the

• Designed for signaling rates up to 660 Mbps

• 0V to 3V common-mode input voltage range

• Operates from a single 3.3V supply

• Typical propagation delay time: 2.6ns

• Output skew 100ps (typical)

• Part-to-part skew is less than 1ns

• PI90LVR3810

• Integrated 110-ohm termination on PI90LVT386

• Low Voltage TTL (LVTTL) levels are 5V tolerant

• Open-circuit fail safe

• Flow-through pin out

• Packaging:

PI90LV3810

ANSI TIA/EIA-644-1995 Standard

Set up time: typical 1ns

Max. clock to output: 1ns

48-Pin Thin Shrink Small Output TSSOP (A)

Description

The PI90LVx3810 family consists of ten differential line receivers

with 3-state outputs that implement Low-Voltage Differential Sig-

naling (LVDS). The PI90LVR3810 has integrated edge-triggered

D-type flops. Any of the differential receivers will provide a valid

logical output state with a ±100mV differential input voltage within

the input common-mode voltage range that allows 0 to 3V of ground

potential difference between two LVDS nodes. The independent EN

pins can be used to place the outputs in either a normal logic state

(high or low logic levels) or a high-impedance state. In high-

impedance state, outputs neither load nor drive the bus lines.

The intended application of these devices, and their signaling

techniques, is for point-to-point baseband data transmission over

controlled impedance media of approximately 100-Ohms with a 100-

Ohm termination resistor. The transmission media may be printed

circuit board traces, backplanes, or cables. The PI90LV3810’s 10

receivers integrated into the same substrate allow precise timing

alignment. In addition, the PI90LVR3810's integrated registers

resynchronize the data to the system clock, for additional signal

deskew.

The integrated registers in the PI90LVR3810 are particularly suitable

for interfacing with LVDS drivers such as the PI90LV3811 over long

distances where signal-to-signal skew may be a problem. On the

positive transition of the differential clock (CLK±) input, the Q

outputs of the flip-flop take on the logic levels set up at the

differential data (RIN±) inputs.

Old data can be retained or new data can be entered while the

outputs are in the high-impedance state. The EN pins do not affect

the internal operation of the flip-flops.

PI90LVR3810 Truth Table

PI90LV3810/PI90LVR3810

High-Speed Differential

Line Receivers

PS8664

02/21/03

Related parts for pi90lv3810

pi90lv3810 Summary of contents

Page 1

... Ohm termination resistor. The transmission media may be printed circuit board traces, backplanes, or cables. The PI90LV3810’s 10 receivers integrated into the same substrate allow precise timing alignment. In addition, the PI90LVR3810's integrated registers resynchronize the data to the system clock, for additional signal deskew ...

Page 2

... PI90LV3810 Block Diagram ...

Page 3

... High level L = Low level X = Irrelevent Z = High-impedance (off Indeterminate = Rising edge of clock – PI90LV3810/PI90LVR3810 High-Speed Differential Line Receivers ± R ± ...

Page 4

... Note: 1. All typical values are at 25°C and with a 3.3V supply. Test Conditions I Enabled, No load -inputs -inputs inputs to GND V = 0.4 sin 2.5E09t PI90LV3810/PI90LVR3810 High-Speed Differential Line Receivers (unless otherwise noted) Min. Typ. -100 = -8mA 2 8mA 0 Disabled -13 ...

Page 5

... all drivers of a single device with all of their inputs PLH PHL 5 PI90LV3810/PI90LVR3810 High-Speed Differential Line Receivers (unless otherwise noted ...

Page 6

... – – PI90LV3810/PI90LVR3810 High-Speed Differential Line Receivers ...

Page 7

... All input pulses are supplied by a generator having the following characteristics: t Rate (PRR Mpps, Pulse width = 10 ±0.2ns the D.U.T. includes instrumentation and fixture capacitance within 0.06m L Figure 2. Timing Test Circuit and Waveforms 7 PI90LV3810/PI90LVR3810 High-Speed Differential Line Receivers or t 1ns, Pulse Repetition r f PS8664 ...

Page 8

... All input pulses are supplied by a generator having the following characteristics: t Rate (PRR) = 0.5 Mpps, pulse width = 500 ±10ns the D.U.T. includes instrumentation and fixture capacitance within 0.06m L Figure 3. Enable/Disable Test Circuit and Waveforms 8 PI90LV3810/PI90LVR3810 High-Speed Differential Line Receivers or t 1ns, Pulse Repetition r f PS8664 ...

Page 9

... PI90LV3810/PI90LVR3810 High-Speed Differential Line Receivers Figure 5. Supply Current vs. Switching Frequency 100 120 140 160 180 200 f – Switching Frequency – MHz Figure 7. Low-Level Output Voltage vs. Low-Level Output Current ...

Page 10

... Ta – Free-Air Temperature – ˚C 3.0 2.9 2.8 2.7 2.6 = 3.6V 2.5 2.4 2.3 2.2 2 PI90LV3810/PI90LVR3810 High-Speed Differential Line Receivers Figure 9. High-to-Low Propagation Delay Time vs. Free-Air Temperature 3. 3. –50 –30 – – Free-Air Temperature – ˚ PS8664 ...

Page 11

... Pericom Semiconductor Corporation 1 1 PI90LV3810/PI90LVR3810 High-Speed Differential Line Receivers 6.0 6.2 SEATING PLANE 0.45 .018 0.75 .030 .319 BSC 8 – ...

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