pi90lvt386a Pericom Semiconductor Corporation, pi90lvt386a Datasheet

pi90lvt386a

Manufacturer Part Number

pi90lvt386a

Description

16-wide Lvds Receiver

Manufacturer

Pericom Semiconductor Corporation

Datasheet

1.PI90LVT386A.pdf (8 pages)

Current page: 1 of 8
Download datasheet (99Kb)

1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2

Pin Configuration

Features

• Sixteen line receivers meet or exceed the requirements of the

• Designed for signaling rates up to 660 Mbps

• 0V to 3V common-mode input voltage range

• Operates from a single 3.3V supply

• Typical propagation delay time: 2.6ns

• Output skew 100ps (typical)

• Part-to-part skew is less than 1ns

• Integrated 110-Ohm termination on PI90LVT386

• Low Voltage TTL (LVTTL) levels are 5V tolerant

• Open-circuit fail safe

• Flow-through pin out

• Packaging (Pb-free & Green available):

ANSI TIA/EIA-644-1995 Standard

- 64-Pin Thin Shrink Small Output TSSOP (A)

1R IN1+

1R IN1–

1R IN2+

1R IN2–

1R IN3+

1R IN3–

1R IN4+

1R IN4–

2R IN1+

2R IN1–

2R IN2–

2R IN3+

2R IN3–

2R IN4+

2R IN4–

3R IN1+

3R IN1–

3R IN2+

3R IN2–

3R IN3+

3R IN3–

3R IN4+

3R IN4–

4R IN1+

4R IN1–

4R IN2+

4R IN2–

4R IN3+

4R IN3–

4R IN4+

4R IN4–

16 Receivers

64-Pin

GND

V CC

GND

EN1

1R OUT1

1R OUT2

1R OUT3

1R OUT4

EN2

2R OUT1

2R OUT2

2R OUT3

2R OUT4

GND

V CC

GND

3R OUT1

3R OUT2

3R OUT3

3R OUT4

EN3

4R OUT1

4R OUT2

4R OUT3

4R OUT4

EN4

GND

V CC

GND

Description

The PI90LVx386 family consists of sixteen differential line receivers

with 3-state outputs that implement Low-Voltage Differential

Signaling (LVDS). Any of the differential receivers will provide a

valid logical output state with a ±100mV differential input voltage

within the input common-mode voltage range that allows 0 to 3V of

ground potential difference between two LVDS nodes. The indepen-

dent EN pins can be used to place the outputs in either a normal logic

state (high or low logic levels) or a high-impedance state. In high-

impedance state, outputs neither load nor drive the bus lines.

The intended application of these devices, and their signaling

techniques, is for point-to-point baseband data transmission over

controlled impedance media of approximately 100-ohms with a

100-Ohm termination resistor. The PI90LVT386 integrates the termi-

nating resistors while the PI90LV386 requires external resistors.

The transmission media may be printed circuit board traces,

backplanes, or cables. The PI90LV386’s 16 receivers integrated into

the same substrate allow precise timing alignment.

These parts are characterized for operation from –40°C to 85°C.

Block Diagram

High-Speed Differential Line Receivers

PI90LV386/PI90LVT386

PS8574C

04/27/05

Related parts for pi90lvt386a

pi90lvt386a Summary of contents

Page 1

...

Page 2

...

Page 3

...

Page 4

...

Page 5

...

Page 6

...

Page 7

...

Page 8

... Packaging Mechanical: 64-Pin TSSOP ( .0197 .007 0.17 BSC .011 0.27 0.50 Ordering Information Ordering Code PI90LV386A PI90LV386AE PI90LVT386A PI90LVT386AE Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging Tape and reel Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com .665 16.9 .673 17.1 .047 1.20 Max. .002 .006 X.XX DENOTES DIMENSIONS X ...

Related keywords

pi90lvt386a datasheet
pi90lvt386a data sheet
pi90lvt386a pdf datasheet
pi90lvt386a component
pi90lvt386a part
pi90lvt386a distributor
pi90lvt386a RoHS
pi90lvt386a datasheet download