w83195bg-341 Winbond Electronics Corp America, w83195bg-341 Datasheet - Page 13

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w83195bg-341

Manufacturer Part Number
w83195bg-341
Description
Winbond Clock Generator For Via P4/kt Series Chipset
Manufacturer
Winbond Electronics Corp America
Datasheet
7.3
7.4 Register 3: REF, 24_48,48,AGP Clock (1 = Enable, 0 = Disable) (Default: F7h )
7.5 Register 4,5 Reserved
7.6
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Register 2: PCI Clock (1 = Enable, 0 = Disable) (Default: FEh)
Register 6: M/N Program (Default: 8Bh)
INV_CPUCS
INV_USB48
M_DIV [6]
M_DIV [5]
M_DIV [4]
M_DIV [3]
M_DIV [2]
M_DIV [1]
M_DIV [0]
N_DIV [8]
PUSB24
PUSB48
PREF1
PREF0
NAME
NAME
PCI_F
NAME
AGP2
AGP1
AGP0
PCI6
PCI5
PCI4
PCI3
PCI2
PCI1
CLOCK GEN. FOR VIA P4/KT SERIES CHIPSET
PWD
1
0
0
0
1
0
1
1
PWD
PWD
1
1
1
1
1
1
0
1
1
1
1
0
1
1
1
1
Programmable N divisor value. Bit 7 ~0 are defined in the Register 7.
Programmable M divisor value.
Pin 10 PCI_F output control
Pin 18 PCI6 output control
Pin 17 PCI5 output control
Pin 15 PCI4 output control
Pin 14 PCI3 output control
Pin 12 PCI2 output control
Pin 11 PCI1 output control
Invert the CPUCS phase, 0: Default, 1: Inverse
Pin 56 REF1 output control
Pin 1 REF0 output control
Pin 21 24_48MHz output control
Pin 20 48MHz output control
Invert the 48MHz phase, 0: In phase with 24_48MHz, 1: 180 degrees
out of phase
Pin 8 AGP2 output control
Pin 7 AGP1 output control
Pin 6 AGP0 output control
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FUNCTION DESCRIPTION
FUNCTION DESCRIPTION
FUNCTION DESCRIPTION
Publication Release Date: March, 2006
Revision 1.1

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