nb6l14m ON Semiconductor, nb6l14m Datasheet

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nb6l14m

Manufacturer Part Number
nb6l14m
Description
2.5 V/3.3 V 3.0 Ghz Differential 1 4 Cml Fanout Buffer
Manufacturer
ON Semiconductor
Datasheet

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NB6L14M
2.5 V/3.3 V 3.0 GHz
Differential 1:4 CML Fanout
Buffer
Multi-Level Inputs with Internal Termination
Description
fanout buffer. The differential inputs incorporate internal 50 W
termination resistors that are accessed through the VT pin. This feature
allows the NB6L14M to accept various logic standards, such as
LVPECL, CML, or LVDS logic levels. The 16 mA differential CML
outputs provide matching internal 50 W terminations and produce
400 mV output swings when externally terminated with a 50 W
resistor to V
capacitor-coupled differential or single-ended input signals. The 1:4
fanout design was optimized for low output skew applications.
performance clock and data products.
Features
© Semiconductor Components Industries, LLC, 2007
September, 2007 - Rev. 2
The NB6L14M is a 3.0 GHz differential 1:4 CML clock or data
The NB6L14M is a member of the ECLinPS MAX™ family of high
GND = 0 V
Input Clock Frequency > 3.0 GHz
Input Data Rate > 2.5 Gb/s
< 20 ps Within Device Output Skew
350 ps Typical Propagation Delay
90 ps Typical Rise and Fall Times
Differential CML Outputs, 340 mV Amplitude, Typical
CML Mode Operating Range: V
Internal Input and Output Termination Resistors, 50 W
V
-40°C to +85°C Ambient Operating Temperature
Available in 3 mm x 3 mm 16 Pin QFN
These are Pb-Free Devices
REFAC
Reference Output Voltage
CC
. The V
REFAC
reference output can be used to rebias
CC
= 2.375 V to 3.63 V with
1
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
IN
VT
IN
EN
VREFAC
*For additional marking information, refer to
Application Note AND8002/D.
Figure 1. Simplified Logic Diagram
A
L
Y
W
G
(Note: Microdot may be in either location)
ORDERING INFORMATION
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
http://onsemi.com
MN SUFFIX
CASE 485G
QFN-16
D
Publication Order Number:
Q
1
DIAGRAM*
16
MARKING
ALYWG
NB6L14M/D
NB6L
14M
G
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3

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nb6l14m Summary of contents

Page 1

... Buffer Multi-Level Inputs with Internal Termination Description The NB6L14M is a 3.0 GHz differential 1:4 CML clock or data fanout buffer. The differential inputs incorporate internal 50 W termination resistors that are accessed through the VT pin. This feature allows the NB6L14M to accept various logic standards, such as LVPECL, CML, or LVDS logic levels ...

Page 2

... CML Output 16 Q0 CML Output - the differential configuration when the input termination pin VT, is connected to a common termination voltage or left open, and if no signal is applied on IN/IN inputs, then the device will be susceptible to self-oscillation. NB6L14M Exposed Pad (EP ...

Page 3

... Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 3. JEDEC standard multilayer board - 2S2P (2 signal, 2 power) with 8 filled thermal vias under exposed pad. NB6L14M Characteristics Human Body Model Machine Mode ...

Page 4

... Input and output parameters vary 1:1 with applied to the complementary input when operating in single-ended mode and V parameters must be complied with simultaneously. IHD ILD ID CMR 8. V minimum varies 1:1 with GND, V CMR CMR input signal. NB6L14M Min 3.3 V 3260 2.5 V 2460 500 ...

Page 5

... Device to device skew is measured between outputs under identical transition @ 0.5 GHz. 14. Additive RMS jitter with 50% duty cycle clock signal. 15. Additive peak-to-peak data dependent jitter with input NRZ data at PRBS 23-1 and K28.5 at 2.5 Gb/s. NB6L14M = 2.375 V to 3.63 V, GND = -40°C to +85°C (Note 9) ...

Page 6

... Figure 5. Differential Input Driven Single-Ended IN IN Figure 7. Differential Inputs Driven Differentially Figure 9. AC Reference Measurement NB6L14M INn 50 W VTn 50 W INn Figure 4. Input Structure thmax thmin GND CMR GND (IN ...

Page 7

... GND NB6L14M 50 W Single-Ended Driver 50 W GND GND Figure 14. Capacitor-Coupled ) (VT Connected to V http://onsemi.com NB6L14M = Open = GND Figure 11. LVDS Interface V CC NB6L14M = _AC* ...

Page 8

... Figure 15. Output Voltage Amplitude (V Frequency at Ambient Temperature (Typical /IN V INPP Figure 16. EN Timing Diagram 50 W Figure 17. CML Output Structure NB6L14M CLOCK OUTPUT FREQUENCY (GHz) out ) versus Output OUTPP GND http://onsemi ...

Page 9

... Figure 18. Typical CML Termination for Output Driver and Device Evaluation ORDERING INFORMATION Device NB6L14MMNG NB6L14MMNR2G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. NB6L14M ...

Page 10

... BOTTOM VIEW 0.05 C NOTE 3 0.575 0.022 3.25 0.128 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. NB6L14M PACKAGE DIMENSIONS 16 PIN QFN MN SUFFIX CASE 485G-01 ISSUE SEATING PLANE A1 ...

Page 11

... N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center  2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051   Phone: 81-3-5773-3850 http://onsemi.com 11 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. NB6L14M/D ...

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