mc10ep11mnr4g ON Semiconductor, mc10ep11mnr4g Datasheet - Page 2

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mc10ep11mnr4g

Manufacturer Part Number
mc10ep11mnr4g
Description
1 2 Differential Fanout Buffer
Manufacturer
ON Semiconductor
Datasheet
Figure 1. 8−Lead Pinout (Top View) and Logic Diagram
Q1
Q0
Q1
Q0
1
2
3
4
Table 2. ATTRIBUTES
1. For additional information, see Application Note AND8003/D.
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Characteristics
R
R
R
http://onsemi.com
1
1
2
Oxygen Index: 28 to 34
Charged Device Model
8
7
6
5
Human Body Model
Machine Model
2
V
D
D
V
CC
EE
TSSOP−8
SOIC−8
DFN8
* Pins will default LOW when left open.
** Pins will default to high when left open.
Table 1. PIN DESCRIPTION
PIN
Q0, Q0, Q1, Q1
V
EP
D*, D**
V
EE
CC
Pb Pkg
Level 1
Level 1
Level 1
UL 94 V−0 @ 0.125 in
73 Devices
37.5 kW
> 200 V
> 4 kV
> 2 kV
Value
75 kW
FUNCTION
ECL Data Inputs
ECL Data Outputs
Positive Supply
Negative Supply
(DFN8 only) Thermal
exposed pad must be
connected to a sufficient
thermal conduit. Electrically
connect to the most negative
supply (GND) or leave
unconnected, floating open.
Pb−Free Pkg
Level 1
Level 3
Level 1

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