mc100el01dr2 ON Semiconductor, mc100el01dr2 Datasheet - Page 2

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mc100el01dr2

Manufacturer Part Number
mc100el01dr2
Description
4-input Or/nor
Manufacturer
ON Semiconductor
Datasheet
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)
Table 2. MAXIMUM RATINGS
V
V
V
I
T
T
q
q
q
q
q
T
q
Symbol
out
A
stg
JA
JC
JA
JC
JA
sol
JC
CC
EE
I
PECL Mode Power Supply
NECL Mode Power Supply
PECL Mode Input Voltage
NECL Mode Input Voltage
Output Current
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Wave Solder
Thermal Resistance (Junction−to−Case)
Parameter
Table 1. PIN DESCRIPTION
PIN
D0−D3
Q, Q
V
V
EP
CC
EE
FUNCTION
ECL Data Inputs
ECL Data Outputs
Positive Supply
Negative Supply
(DFN8 only) Thermal exposed pad must be
connected to a sufficient thermal conduit. Elec-
trically connect to the most negative supply
(GND) or leave unconnected, floating open.
Pb−Free
Pb
http://onsemi.com
V
V
V
V
Continuous
Surge
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
(Note 1)
EE
CC
EE
CC
Condition 1
= 0 V
= 0 V
= 0 V
= 0 V
2
V
V
8 SOIC
8 SOIC
8 SOIC
8 TSSOP
8 TSSOP
8 TSSOP
DFN8
DFN8
DFN8
I
I
 V
 V
Condition 2
CC
EE
41 to 44 ± 5%
−65 to +150
−40 to +85
41 to 44
35 to 40
Rating
100
190
130
185
140
129
265
265
−8
−6
50
84
8
6
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
mA
mA
°C
°C
°C
V
V
V

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