mc100ep35mnr4 ON Semiconductor, mc100ep35mnr4 Datasheet
mc100ep35mnr4
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mc100ep35mnr4 Summary of contents
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MC10EP35, MC100EP35 3.3V / 5V ECL JK Flip-Flop Description The MC10/100EP35 is a higher speed/low voltage version of the EL35 JK flip−flop. The J/K data enters the master portion of the flip−flop when the clock is LOW and is transferred to ...
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Flip Flop CLK 3 R RESET 4 Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 3. ATTRIBUTES Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Moisture Sensitivity, Indefinite Time Out ...
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Table 4. MAXIMUM RATINGS Symbol Parameter V PECL Mode Power Supply CC V NECL Mode Power Supply EE V PECL Mode Input Voltage I NECL Mode Input Voltage I Output Current out T Operating Temperature Range A T Storage Temperature ...
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Table 5. 10EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note Output LOW Voltage (Note Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...
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Table 8. 100EP DC CHARACTERISTICS, PECL Symbol Characteristic I Power Supply Current EE V Output HIGH Voltage (Note 10 Output LOW Voltage (Note 10 Input HIGH Voltage (Single−Ended Input LOW Voltage (Single−Ended ...
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Table 11. AC CHARACTERISTICS V Symbol Characteristic f Maximum Frequency max (See Figure 2. F /JITTER) max t , Propagation Delay to PLH t Output Differential R, CLK PHL t Reset Recovery RR t Setup Time S ...
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... MC10EP35DTR2G MC10EP35MNR4 MC10EP35MNR4G MC100EP35D MC100EP35DG MC100EP35DR2 MC100EP35DR2G MC3100EP35DT MC3100EP35DTG MC100EP35DTR2 MC100EP35DTR2G MC100EP35MNR4 MC100EP35MNR4G †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/ ...
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Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ...
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... C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE 0.10 (0.004) ...
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K 8x REF 0.10 (0.004) 0.15 (0.006 L −U− PIN 1 IDENT 0.15 (0.006 −V− C 0.10 (0.004) D −T− G SEATING PLANE PACKAGE DIMENSIONS TSSOP−8 ...
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... Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303− ...