mc100ep52mnr4 ON Semiconductor, mc100ep52mnr4 Datasheet - Page 2

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mc100ep52mnr4

Manufacturer Part Number
mc100ep52mnr4
Description
3.3v / 5v Ecl Differential Receiver/driver With Internal Termination Data And Clock D Flip-flop
Manufacturer
ON Semiconductor
Datasheet

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Figure 1. 8−Lead Pinout (Top View) and Logic Diagram
CLK
CLK
D
D
1
2
3
4
1. For additional information, see Application Note AND8003/D.
Table 3. ATTRIBUTES
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
D
Flip-Flop
Characteristics
Oxygen Index: 28 to 34
http://onsemi.com
8
7
6
5
V
Q
Q
V
Charged Device Model
CC
EE
Human Body Model
2
Machine Model
TSSOP−8
Table 1. PIN DESCRIPTION
Table 2. TRUTH TABLE
* Pins will default LOW when left open.
Z = LOW to HIGH Transition
SOIC−8
CLK*, CLK*
D*, D*
Q, Q
V
V
EP
PIN
CC
EE
DFN8
D
H
L
Pb Pkg
Level 1
Level 1
Level 1
UL 94 V−0 @ 0.125 in
FUNCTION
ECL Clock Inputs
ECL Data Input
ECL Data Outputs
Positive Supply
Negative Supply
(DFN8 only) Thermal exposed pad
must be connected to a sufficient
thermal conduit. Electrically connect to
the most negative supply (GND) or
leave unconnected, floating open.
155 Devices
> 200 V
> 4 kV
> 2 kV
75 kW
Value
N/A
CLK
Z
Z
Pb−Free Pkg
Level 1
Level 3
Level 1
Q
H
L

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