sy89873l Micrel Semiconductor, sy89873l Datasheet

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sy89873l

Manufacturer Part Number
sy89873l
Description
Sy89873l 3.3v, 2.0ghz Any Diff. In-to-lvds Programmable Clock Divider/fanout Buffer W/internal Termination
Manufacturer
Micrel Semiconductor
Datasheet

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sy89873lMG
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MICREL
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sy89873lMG
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M9999-082407
hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
Precision Edge is a registered trademark of Micrel, Inc.
Micro LeadFrame and MLF are registered trademarks of Amkor Technology, Inc.
FEATURES
APPLICATIONS
FUNCTIONAL BLOCK DIAGRAM
Guaranteed AC performance
• > 2.0GHz f
• > 3.0GHz f
• < 800ps t
• < 15ps within-device skew
• < 190ps rise/fall time
Low jitter design
• < 1ps
• < 10ps
Unique input termination and V
and AC-coupled inputs: any differential inputs
(LVPECL, LVDS, CML, HSTL)
Precision differential LVDS outputs
Matched delay: all outputs have matched delay,
independent of divider setting
TTL/CMOS inputs for select and reset/disable
Two LVDS output banks (matched delay)
• Bank A: Buffered copy of input clock (undivided)
• Bank B: Divided output (
3.3V power supply
Wide operating temperature range: –40
Available in 16-pin (3mm × × × × × 3mm) MLF
SONET/SDH line cards
Transponders
High-end, multiprocessor servers
V
REF-AC
two copies
/IN
S0
S1
IN
V
T
/RESET
RMS
50Ω
50Ω
PP
PD
Decoder
total jitter
cycle-to-cycle jitter
MAX
MAX
(matched-delay between banks)
output toggle
input
Enable
FF
÷
2,
Divided
Enable
2, 4, 8
MUX
or 16
by
÷
T
4,
pin for DC-coupled
÷
8,
3.3V, 2.0GHz ANY DIFF. IN-TO-LVDS
PROGRAMMABLE CLOCK DIVIDER
FANOUT BUFFER W/ INTERNAL TERMINATION
®
÷
16),
package
°
C to +85
QA
/QA
QB0
/QB0
QB1
/QB1
°
C
1
divider accepts any high-speed differential clock input (AC- or
DC-coupled) CML, LVPECL, HSTL or LVDS and divides down
the frequency using a programmable divider ratio to create a
frequency-locked, lower speed version of the input clock. The
SY89873L includes two output banks. Bank A is an exact
copy of the input clock (pass through) with matched
propagation delay to Bank B, the divided output bank. Available
divider ratios are 2, 4, 8 and 16. In a typical 622MHz clock
system this would provide availability of 311MHz, 155MHz,
77MHz or 38MHz auxiliary clock components.
design that allows access to the termination network through
a VT pin. This feature allows the device to easily interface to
all AC- or DC-coupled differential logic standards. A V
reference is included for AC-coupled applications.
Edge
consider the SY89872U. For applications that require an
LVPECL output, consider the SY89871U.
(Bank B). In the pass-through function (Bank A) the /RESET
synchronously enables or disables the outputs on the next
falling edge of IN (rising edge of /N). Refer to the Timing
Diagram.
site at: www.micrel.com.
DESCRIPTION
TYPICAL APPLICATION
This 3.3V low-skew, low-jitter, precision LVDS output clock
The differential input buffer has a unique internal termination
The SY89873L is part of Micrel’s high-speed Precision
The /RESET input asynchronously resets the divider outputs
All support documentation can be found on Micrel’s web
622MHz LVPECL
®
Clock In
timing and distribution family. For 2.5V applications,
/IN
Bank B: 155.5MHz: For OC-3 line card
Bank A: 622MHz: For OC-12 line card
IN
SONET Clock Generator
622MHz/155.5MHz
Set to pass-through
Set to divide-by-4
Clock Gen
OC-12 or
OC-3
Precision Edge
QA
/QA
QB
/QB
Rev.: F
Issue Date: February 2007
Precision Edge
Precision Edge
155.5MHz LVDS
SY89873L
622MHz LVDS
Clock Out
Clock Out
Amendment: /0
SY89873L
REF-AC
®
®
®

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sy89873l Summary of contents

Page 1

... The pin for DC-coupled T SY89873L includes two output banks. Bank exact copy of the input clock (pass through) with matched propagation delay to Bank B, the divided output bank. Available divider ratios are and 16 typical 622MHz clock system this would provide availability of 311MHz, 155MHz, 77MHz or 38MHz auxiliary clock components ...

Page 2

... Pb-Free bar line indicator = 25°C, DC Electricals only. A input. T /2. CC Bank B Outputs Input Clock ÷ 2 Input Clock ÷ 4 Input Clock ÷ 8 Input Clock ÷ 16 QB0 = LOW, /QB0 = HIGH QB1 = LOW, /QB1 = HIGH ® SY89873L Lead Finish Sn-Pb Sb-Pb NiPdAu Pb-Free NiPdAu Pb-Free (2) (2) ...

Page 3

... T 3 Precision Edge (2) ) ...................................... +3.3V ±10 ......................... –40°C to +85°C A (θ (4) (Ψ Min Typ 3.0 3 100 0.1 –0.3 0.1 0.2 V –1.525 V –1.425 inputs. Do not apply a T pin. T ® SY89873L Max Units 3.6 V 115 mA 110 Ω –1.325 V CC ...

Page 4

... The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 11. Measured as per Figure 1a, 100Ω across Q and /Q outputs. 12. See Figure 1c. M9999-082407 hbwhelp@micrel.com or (408) 955-1690 (10) Condition Notes 11, 12 Note 11 Note 11 Note 11 (10) Condition 4 ® Precision Edge SY89873L Min Typ Max Units 250 350 450 mV 1.475 V 0.925 V 1.125 1.275 V – ...

Page 5

... Output Swing: ≥ 200mV Note 14 Input Swing < 400mV Input Swing ≥ 400mV Note 15 Note 15 Note 15 Note 16 Note 17 Note 18 (device), no more than one output edge in 10 MAX 5 ® Precision Edge SY89873L Min Typ Max Units 2.0 GHz 3.2 GHz 550 660 800 ps 500 610 ...

Page 6

... V OUT ± Figure 1b. LVDS Common Mode Measurement V OUT IN V (Swing Precision Edge 50Ω ±1% 50Ω ±1% GND V V DIFF_IN , DIFF_OUT 700mV (Typical) Figure 1d. Differential Swing V CC (Swing) OUT ® SY89873L V OCM , ∆V OCM ...

Page 7

... Nominal Propagation Delay 800 700 600 500 400 0 200 400 600 800 1000 1200 Nominal Propagation Delay vs. Temperature 800 700 600 500 400 -40 - 100 120 TEMPERATURE (°C) 7 Precision Edge SY89873L vs. Input Swing INPUT SWING (mV) ® ...

Page 8

... Micrel, Inc. FUNCTIONAL CHARACTERISTICS Conditions 3.3V 25°C, unless otherwise stated 622MHz and QB @ 155.5MHz (Divided-by-4) QA /QA 622MHz QB ÷4 /QB 155MHz TIME (1ns/div.) M9999-082407 hbwhelp@micrel.com or (408) 955-1690 QA Output @ 2.0GHz Q /Q TIME (100ps/div.) 8 Precision Edge SY89873L QA Output @ 1.25GHz TIME (100ps/div.) ® ...

Page 9

... Micrel, Inc. INPUT BUFFER STRUCTURE V CC 1.86kΩ 1.86kΩ IN 50Ω 50Ω GND /IN Figure 2a. Simplified Differential Input Stage M9999-082407 hbwhelp@micrel.com or (408) 955-1690 1.86kΩ 1.86kΩ Figure 2b. Simplified TTL/CMOS Input 9 Precision Edge SY89873L V CC 25kΩ /RESET R GND ® ...

Page 10

... LVDS /IN SY89873L GND REF-AC Figure 3e. LVDS Input Interface Data Sheet Link www.micrel.com/product-info/products/sy89871u.shtml www.micrel.com/product-info/products/sy89872u.shtml www.amkor.com/products/notes_papers/MLF_AppNote_0902.pdf www.micrel.com/product-info/products/solutions.shtml 10 Precision Edge SY89873L LVPECL /IN SY89873L V –2V* GND .01µF 50Ω REF- Bypass with 0.01µ Figure 3c. DC-Coupled LVPECL Input Interface Figure 3f ...

Page 11

... PCB Thermal Consideration for 16-Pin MLF (Always solder, or equivalent, the exposed pad to the PCB (408) 474-1000 FAX Micrel for any damages resulting from such use or sale. © 2006 Micrel, Incorporated. 11 Package EP- Exposed Pad Die ® Package http://www.micrel.com WEB ® Precision Edge SY89873L ...

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