njw1163 New Japan Radio Co.,Ltd, njw1163 Datasheet - Page 14

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njw1163

Manufacturer Part Number
njw1163
Description
Audio Processor With Subwoofer Output
Manufacturer
New Japan Radio Co.,Ltd
Datasheet

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NJW1163/A
- 14 -
I
SLAVE ADDRESS
CONTROL REGISTER TABLE
CONTROL REGISTER DEFAULT VALUE
R/W
<Write Mode>
<Read Mode>
ADR
DEFINITION OF I
2
Control register default value is all “0”.
PORT1, PORT0 terminal setting
C BUS FORMAT
Address
Address
The auto increment function cycles the select address as follows.
00H 01H 02H 03H 04H 05H 00H
D1/D0
1bit
The select address sets each function (Volume, Balance, Bass Boost Select, AGC, Surround, Tone Control, AUX).
Select
Select
MSB
S
00H
01H
02H
03H
04H
05H
00H
01H
02H
03H
04H
05H
D7
R/W = 0 : Write Mode, ADR = 0/1
R/W = 1 : Read Mode, ADR = 0/1
1
1
1
1
1
1
0
1
MSB
S: Starting Term
A: Acknowledge Bit
P: Ending Term
: Set the Write Mode or Read Mode.
: Set the Slave Address by “ADR” terminal. (See Application Circuit)
0
0
0
0
0
Slave Address
D1/D0 output “0” at PORT1/PORT0 terminal receive High signal “1” (more than 3.5V)
D1/D0 output “1” at PORT1/PORT0 terminal receive Low signal “0” (less than 1.0V)
CHS
BCB
BCT
D7
D7
D6
0
0
0
0
0
0
1
8bit
2
C REGISTER
0
0
0
0
0
SUR
Slave Address
0
0
0
0
0
D6
LSB
0
0
0
0
0
0
D6
D5
1
0
0
0
0
0
1bit
A
MSB
D5
0
0
0
0
0
0
AUX1
0
0
0
0
0
D5
D4
1
Select Address
ADR
BIT
0
1
0
1
8bit
D4
0
0
0
0
0
0
BASS
TREB
TRIM
D4
D3
1
LSB
R/W
BIT
0
0
1
1
Remarks
AUX0
LSB
VOL
BAL
BIT
D3
80(h)
82(h)
81(h)
83(h)
0
0
0
0
0
0
Hex
-
-
-
-
1bit
A
D3
D2
1
MSB
D2
0
0
0
0
0
0
PORT1
D2
D1
Data
8bit
AGCL
D1
0
0
0
0
0
0
PORT0
LSB
D1
D0
1bit
D0
A
0
0
0
0
0
0
: Don’t Care
1bit
P
BBSW
AGC
D0

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