is61lv5128al Integrated Silicon Solution, Inc., is61lv5128al Datasheet - Page 5

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is61lv5128al

Manufacturer Part Number
is61lv5128al
Description
512k X 8 High-speed Cmos Static Ram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet

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IS61LV5128AL
READ CYCLE SWITCHING CHARACTERISTICS
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage.
Integrated Silicon Solution, Inc. — www.issi.com —
Rev. C
04/15/05
AC TEST LOADS
Figure 1
AC TEST CONDITIONS
Symbol
levels of 0V to 3.0V and output loading specified in Figure 1.
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
t
t
t
t
t
t
t
t
t
t
t
RC
OHA
ACE
DOE
HZOE
LZOE
HZCE
LZCE
PU
PD
AA
OUTPUT
(2)
(2)
(2)
(2
3.3V
Including
Parameter
Read Cycle Time
Address Access Time
Output Hold Time
CE Access Time
OE Access Time
OE to High-Z Output
OE to Low-Z Output
CE to High-Z Output
CE to Low-Z Output
Power Up Time
Power Down Time
jig and
scope
30 pF
319
353
See Figures 1 and 2
0V to 3.0V
Unit
1.5V
3 ns
Min. Max.
10
Figure 2
2
0
0
3
0
-10
1-800-379-4774
OUTPUT
10
10
10
(1)
4
4
4
(Over Operating Range)
3.3V
Min. Max.
Including
12
2
0
0
3
0
-12
jig and
scope
5 pF
12
12
12
5
5
6
319
353
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ISSI
®
5

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