ics331 Holt Integrated Circuits, Inc., ics331 Datasheet - Page 2

• Manufacturer Part Number: ics331
• Description: Qtclock Single Output Clock
• Manufacturer: Holt Integrated Circuits, Inc.

MDS 331
Pin Assignment
Pin Descriptions
X1/ICLK
External Components / Crystal Selection
The ICS331 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be
connected close to the ICS331 to minimize lead inductance. No external power supply filtering is required
for this device. A 33
fundamental mode crystal should be used. Crystal capacitors should be connected from each of the pins
X1 and X2 to Ground as shown in the Block Diagram on page 1. The value (in pF) of these crystal caps
should be = (C L -6)*2, where C L is the crystal load capacitance in pF. These external capacitors are
required for all applications.
Key: XI/XO = Crystal Connections, I = Input, O = output, P = power supply connection
Number
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•[phone]tel • www.icst.com
VDD
GND
1
2
3
4
5
6
7
8
S0
X1/ICLK
Name
PDTS
VDD
GND
3
4
1
2
CLK
X2
S0
S1
terminating resistor can be used next to each output pin. A parallel resonant,
Type
XO
XI
O
P
P
I
I
I
8
7
6
5
ADVANCE INFORMATION
ADVANCE INFORMATION
Description
Crystal connection. Connect to an 5 to 27 MHz fundamental crystal or clock input.
Connect to +3.3 V.
Connect to ground.
Select pin S0 for frequency selections on CLK. Internal pull-up.
CMOS level clock output. Weak internal pull-down when tri state.
Select pin S1 for frequency selections on CLK. Internal pull-up.
Powers down entire chip, tri states CLK output, when low. Internal pull-up.
Crystal connection. Connect to an 5 to 27 MHz fundamental crystal. Float for clock.
CLK
PDTS
X2
S1
QTClock™ Single Output Clock
2
The select pins can also be defined as power down
or tri state pins.
Output
S1
0
0
1
1
Select Table
S0
0
1
0
1
CLK (MHz)
TBD
TBD
TBD
TBD
Spread Amount
Revision 112900
TBD
TBD
TBD
TBD
ICS331