ics307 Integrated Device Technology, ics307 Datasheet
ics307
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ics307 Summary of contents
Page 1
... The devices includes a PDTS pin which tri-states the output clocks and powers down the entire chip. The ICS307-02 features a default clock output at start-up and is recommended for all new designs. This product is intended for clock generation. It has low output jitter (variation in the output period), but input to output skew and jitter are not defined nor guaranteed ...
Page 2
... Powers down entire chip, tri states CLK1 and CLK2 outputs when low. Internal Input pull-up connect. Do not connect anything to this pin connect. Do not connect anything to this pin. Input crystal connection. Connect to a crystal or leave unconnected for clock XO input. 2 SER PROG CLOCK SYNTHESIZER Pin Description ICS307-01/-02 REV G 031606 ...
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... The ICS307-02 on-chip registers are initially configured to provide a x1 output clock on both the CLK1 and CLK2 outputs. The output frequency will be the same as the input clock or crystal. This is useful if the ICS307 will provide the initial system clock at power-up. Since this feature is an advantage in most systems, the ICS307-02 is recommended for new designs ...
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... V or 3.3 V (MHz 200 100 135 Recommended VDD 1.4 V VDD/2 VDD = 5V 22.3 - 0.083 f 22.1 - 0.094 f 23.1 - 0.093 f 22.9 - 0.108 f 23.7 - 0.106 f 23.5 - 0.120 f 24.4 - 0.120 f 24.2 - 0.135 f 4 SER PROG CLOCK SYNTHESIZER Max. Frequency Industrial Temp. Version 36 180 120 3.3 V VDD = 3.3V ICS307-01/-02 REV G 031606 ...
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... Duty Cycle Settings C1:C0 Internal Load Capacitance for Crystal The ICS307 can be reprogrammed at any time during operation. If R6:0, V8:0, TTL, or C1:0 are changed, the frequency will transition smoothly to the new value over about 1 ms, without glitches or short cycles. If S2:0 is changed possible to generate glitches on CLK1 and also on CLK2 for F1 ...
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... Byte 1 As show in Figure 2, after these 24 bits are clocked into the ICS307, taking STROBE high will send this data to the internal latch and the CLK output will lock within 10 ms. Note: If STROBE is in the high state and SCLK is pulsed, DATA is clocked directly to the internal latch and the output conditions will change accordingly ...
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... SERIALLY PROGRAMMABLE CLOCK SOURCE Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS307-01/-02. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied ...
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... Min. Typ. Max. Units ± 270 kΩ Min. Typ. Max. Units 5 27 MHz 2 50 MHz 6 200 MHz 6 180 MHz 49- ±120 ps Min. Typ. Max. Units °C/W 120 °C/W 115 °C/W 105 °C/W 58 ICS307-01/-02 REV G 031606 ...
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... Package 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC 16-pin SOIC ICS307-01/-02 REV G 031606 Inches Max .0688 .0098 .020 .0098 .3937 .1574 .2440 .020 .050 0° 8° ...
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... ICS307-01/-02 SERIALLY PROGRAMMABLE CLOCK SOURCE Innovate with IDT and accelerate your future networks. Contact: www.IDT.com For Sales 800-345-7015 408-284-8200 Fax: 408-284-2775 Corporate Headquarters Integrated Device Technology, Inc. 6024 Silver Creek Valley Road San Jose, CA 95138 United States 800 345 7015 +408 284 8200 (outside U.S.) © ...